The parameter count of read had to be a multiple of 4, otherwise the
result was truncated. Now all values are possible.
Signed-off-by: Mathias Duckeck <mathias.duckeck@avat.de>
- Fix EtherCAT signals drive strengh (from errata PORTS_CM.H002), caused bus faults.
- Changed xmc4_ecat.c for compile time pin definition.
- Fixed xmc4_ecat.c register not written (reset value already used).
- Removed EXTCLK for xmc4800 as pin is used for ECAT.
- Clean xmc4 familly board.h and clocks config.
Signed-off-by: adriendesp <adrien.desproges@gmail.com>
- ARCH_CHIP_ESP32C3_LEGACY created
- ARCH_CHIP_ESP32C3_GENERIC is now ARCH_CHIP_ESP32C3
This is part of deprecating esp32c3-devkit as esp32c3-legacy and
using esp32c3-generic (now esp32c3-devkit) instead.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Update the CA training result check to match the HSS reference code.
The original check which required phase delays to be 5 taps separated was wrong.
This has also been removed from the HSS.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
The window is 32 taps, so in order to the eye to be completely inside the window,
the (offset + width) has to be less or equal than (32 - margin).
Add this additional sanity check in the mpfs_training_verify.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
Fix build errors in the Tricore architecture caused by the missing `lock`
member in `struct tricore_systimer_lowerhalf_s`, as well as the missing
definition of the `IFX_CFG_CPU_CLOCK_FREQUENCY` macro.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
Add an option to use HPWORK queue for ethernet driver, to reduce
delays if more time critical messaging via ethernet is wanted.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
This patch adds support for Two-Wire interface in AVR Dx chips.
Only master mode is supported in this version.
The driver was tested using TC74Ax thermal sensor and simple application
that read the temperature from it. (Driver for the sensor is not in-tree.)
Signed-off-by: Kerogit <kr.git@kerogit.eu>
The Kconfig configuration was offering alternate routing options
for USART peripherals but there was no code which would act
on those settings. This patch fixes it.
Additionally, since the code is being worked on, this patch
also renames USART-related configuration options from AVR_HAS_
to AVR_HAVE_ . This is based on GitHub and mailing list discussion
where it was pointed out that other architectures use "HAVE".
Patch was tested by choosing few combinations of the configuration
and verifying which registers are being set in disassembly. Base
configuration was also tested by an application that uses two ports.
Signed-off-by: Kerogit <kr.git@kerogit.eu>
Toolchain.defs file was treating all supported chips as AVR128DA28,
which became apparent while testing changes in USART handling.
Signed-off-by: Kerogit <kr.git@kerogit.eu>
This commit adds support for SPI_SETDELAY operation on SAMv7 QSPI
peripheral running in SPI mode. The logic is the same as for standard
SPI peripheral, just different registers. The change allows to set
custom delays between transfers, chip selects and so on.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This add support for using the cryptographic accelerator
within the ESP32 for HMAC-SHA operations. The supported
algorithms are: SHA1 and SHA512.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
During I2C read, one-too-many byte is read, which can lead to the I2C bus
getting stuck. This is likely due to the STOP condition being set at the
wrong time or being missed completely. The chip offers a shortcut, such
that the STOP condition is set automatically after the last byte is being
written/read.
Signed-off-by: Max Kriegleder <max.kriegleder@gmail.com>
Since the bl602 do not support the atomic extention, we should compile
it with `-march=rv32imfc`, or it will fail to boot when executing the
`lr.w` instruction.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
When TICKLESS not enabled, up_alarm_set_lowerhalf will call start, if we
overwrite the compare register will cause TICK mode no longer isr.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
In multi-core environment where NuttX runs on each core, if one core
sets the RTC time, the RTC value gotten on other cores is incorrect.
This is caused by clock_gettime(CLOCK_MONOTONIC) function used to get
elapsed time, which uses a core-specific global varaiable g_basetime
as the base time.
To fix this, update the g_basetime from the backup SRAM that can be
shared between cores in setting/getting the RTC time.
Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
Add a function imx9_lpspi_select_cs to assert CS at the start of
an SPI transfer and keep it asserted until called again to
de-assert it. This can be called by board-provided imx9_lpspi_select,
in case the CS needs to be controlled via the LPSPI block and not
GPIO.
The TCR register CONT (continue) bit is asserted to prevent CS toggling
during the transfer, and the PCS bits are set to mark the correct CS
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
According to the TRM, only bits 24-25 are reserved for chip select, and
the maximum number of internal chip selects is 3 (on LPSPI4 bus only).
Fix the TCR_PCS_MASK and remove extra definitions.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
Directly downloading the Git repository is inconvenient for local debugging.
This will allow to automatically download external packages from the Internet.
If not set, the repo need to be download will need to provide them manually,
otherwise an error will occur and the build will be aborted.
Add `USE_NXTMPDIR_ESP_REPO_DIRECTLY`, with this we can use
`USE_NXTMPDIR_ESP_REPO_DIRECTLY=y make` which can directly use esp-hal-3rdparty
under nxtmpdir without CLONE, CHECK_COMMITSHA, reset, checkout and update. Just
`cp -rf nxtmpdir/esp-hal-3rdparty chip/$(ESP_HAL_3RDPARTY_REPO)`.
Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com>
