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arch/risc-v/esp32[-c3|-c6|-h2]: Add PM support
Add PM support for esp32[-c3|-c6|-h2] Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
This commit is contained in:
Eren Terzioglu
committed by
Xiang Xiao
Xiang Xiao
parent
09a71ec7c1
commit
8417cf0c83
@@ -264,6 +264,453 @@ config ESPRESSIF_ULP_ENABLE_UBSAN
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endmenu # LP Core (Low-power core) Coprocessor Configuration
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menu "PM Configuration"
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if PM
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config PM_EXT1_WAKEUP
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bool "PM EXT1 Wakeup"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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default n
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---help---
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Enable EXT1 wakeup functionality.
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This allows the system to wake up from PM_STANDBY
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when a GPIO pin configured as an EXT1 wakeup source is triggered.
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menu "PM EXT1 Wakeup Sources"
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depends on PM_EXT1_WAKEUP
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config PM_EXT1_WAKEUP_RTC_GPIO0
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bool "RTC_GPIO0"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable RTC GPIO0 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO1
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bool "RTC_GPIO1"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable RTC GPIO1 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO2
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bool "RTC_GPIO2"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable RTC GPIO2 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO3
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bool "RTC_GPIO3"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable RTC GPIO3 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO4
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bool "RTC_GPIO4"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable RTC GPIO4 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO5
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bool "RTC_GPIO5"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable RTC GPIO5 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO6
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bool "RTC_GPIO6"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable RTC GPIO6 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO7
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bool "RTC_GPIO7"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable RTC GPIO7 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO8
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bool "RTC_GPIO8"
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depends on ARCH_CHIP_ESP32H2
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default n
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---help---
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Enable RTC GPIO8 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO9
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bool "RTC_GPIO9"
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depends on ARCH_CHIP_ESP32H2
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default n
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---help---
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Enable RTC GPIO9 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO10
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bool "RTC_GPIO10"
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depends on ARCH_CHIP_ESP32H2
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default n
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---help---
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Enable RTC GPIO10 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO11
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bool "RTC_GPIO11"
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depends on ARCH_CHIP_ESP32H2
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default n
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---help---
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Enable RTC GPIO11 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO12
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bool "RTC_GPIO12"
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depends on ARCH_CHIP_ESP32H2
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default n
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---help---
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Enable RTC GPIO12 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO13
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bool "RTC_GPIO13"
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depends on ARCH_CHIP_ESP32H2
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default n
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---help---
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Enable RTC GPIO13 as an EXT1 wakeup source.
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config PM_EXT1_WAKEUP_RTC_GPIO14
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bool "RTC_GPIO14"
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depends on ARCH_CHIP_ESP32H2
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default n
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---help---
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Enable RTC GPIO14 as an EXT1 wakeup source.
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choice PM_EXT1_WAKEUP_TRIGGER_MODE
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prompt "PM EXT1 Wakeup Trigger Mode"
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default PM_EXT1_WAKEUP_TRIGGER_ANY_LOW
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config PM_EXT1_WAKEUP_TRIGGER_ANY_LOW
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bool "Wake the chip when any of the selected GPIOs go low"
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config PM_EXT1_WAKEUP_TRIGGER_ANY_HIGH
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bool "Wake the chip when any of the selected GPIOs go high"
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endchoice # PM_EXT1_WAKEUP_TRIGGER_MODE
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endmenu # PM_EXT1_WAKEUP_SOURCES
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config PM_ULP_WAKEUP
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bool "PM ULP Wakeup"
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depends on ARCH_CHIP_ESP32C6 && ESPRESSIF_USE_LP_CORE
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default n
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---help---
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Enable ULP coprocessor wakeup functionality.
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This allows the system to wake up from PM_STANDBY
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when ULP app triggers HP core to wakeup with "ulp_lp_core_wakeup_main_processor"
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call on ULP app.
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config PM_GPIO_WAKEUP
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bool "PM GPIO Wakeup"
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default n
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---help---
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Enable GPIO wakeup functionality.
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This allows the system to wake up from PM_STANDBY
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when a GPIO pin configured as wakeup source is triggered.
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menu "PM GPIO Wakeup Sources"
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depends on PM_GPIO_WAKEUP
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config PM_GPIO_WAKEUP_GPIO0
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bool "GPIO0"
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default n
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---help---
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Enable GPIO0 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO1
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bool "GPIO1"
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default n
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---help---
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Enable GPIO1 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO2
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bool "GPIO2"
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default n
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---help---
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Enable GPIO2 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO3
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bool "GPIO3"
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default n
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---help---
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Enable GPIO3 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO4
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bool "GPIO4"
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default n
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---help---
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Enable GPIO4 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO5
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bool "GPIO5"
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default n
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---help---
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Enable GPIO5 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO6
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bool "GPIO6"
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default n
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---help---
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Enable GPIO6 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO7
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bool "GPIO7"
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default n
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---help---
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Enable GPIO7 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO8
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bool "GPIO8"
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default n
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---help---
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Enable GPIO8 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO9
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bool "GPIO9"
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default n
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---help---
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Enable GPIO9 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO10
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bool "GPIO10"
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default n
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---help---
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Enable GPIO10 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO11
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bool "GPIO11"
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default n
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---help---
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Enable GPIO11 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO12
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bool "GPIO12"
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default n
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---help---
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Enable GPIO12 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO13
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bool "GPIO13"
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default n
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---help---
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Enable GPIO13 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO14
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bool "GPIO14"
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default n
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---help---
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Enable GPIO14 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO15
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bool "GPIO15"
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default n
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---help---
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Enable GPIO15 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO16
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bool "GPIO16"
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default n
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---help---
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Enable GPIO16 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO17
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bool "GPIO17"
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default n
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---help---
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Enable GPIO17 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO18
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bool "GPIO18"
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default n
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---help---
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Enable GPIO18 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO19
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bool "GPIO19"
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default n
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---help---
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Enable GPIO19 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO20
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bool "GPIO20"
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default n
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---help---
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Enable GPIO20 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO21
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bool "GPIO21"
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default n
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---help---
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Enable GPIO21 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO22
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bool "GPIO22"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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default n
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---help---
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Enable GPIO22 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO23
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bool "GPIO23"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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default n
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---help---
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Enable GPIO23 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO24
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bool "GPIO24"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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default n
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---help---
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Enable GPIO24 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO25
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bool "GPIO25"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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default n
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---help---
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Enable GPIO25 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO26
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bool "GPIO26"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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default n
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---help---
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Enable GPIO26 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO27
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bool "GPIO27"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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default n
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---help---
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Enable GPIO27 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO28
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bool "GPIO28"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable GPIO28 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO29
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bool "GPIO29"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable GPIO29 as an GPIO wakeup source.
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config PM_GPIO_WAKEUP_GPIO30
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bool "GPIO30"
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depends on ARCH_CHIP_ESP32C6
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default n
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---help---
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Enable GPIO30 as an GPIO wakeup source.
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choice PM_GPIO_WAKEUP_TRIGGER_MODE
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prompt "PM GPIO Wakeup Trigger Mode"
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default PM_GPIO_WAKEUP_TRIGGER_ANY_LOW
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config PM_GPIO_WAKEUP_TRIGGER_ANY_LOW
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bool "Wake the chip when any of the selected GPIOs go low"
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config PM_GPIO_WAKEUP_TRIGGER_ANY_HIGH
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bool "Wake the chip when any of the selected GPIOs go high"
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endchoice # PM_GPIO_WAKEUP_TRIGGER_MODE
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endmenu # PM_GPIO_WAKEUP_SOURCES
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config PM_UART_WAKEUP
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bool "PM UART Wakeup"
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depends on ESPRESSIF_UART0 || ESPRESSIF_UART1
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default n
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---help---
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Enable UART wakeup functionality.
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This allows the system to wake up from PM_STANDBY
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when a UART configured as an UART wakeup source is triggered.
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menu "PM UART Wakeup Sources"
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depends on PM_UART_WAKEUP
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choice PM_UART_WAKEUP_UART_NUM
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prompt "PM UART Wakeup UART Number"
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default PM_UART_WAKEUP_UART0 if ESPRESSIF_UART0
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default PM_UART_WAKEUP_UART1 if ESPRESSIF_UART1
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config PM_UART_WAKEUP_UART0
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depends on ESPRESSIF_UART0
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bool "Wake the chip up when UART0 gets a data"
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config PM_UART_WAKEUP_UART1
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depends on ESPRESSIF_UART1
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bool "Wake the chip up when UART1 gets a data"
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endchoice # PM_UART_WAKEUP_UART_NUM
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choice PM_UART_WAKEUP_MODE
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prompt "PM UART Wakeup Mode"
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default PM_UART_WAKEUP_START_BIT_MODE if !ARCH_CHIP_ESP32C3_GENERIC
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default PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD_MODE if ARCH_CHIP_ESP32C3_GENERIC
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config PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD_MODE
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bool "Wake-up triggered by active edge threshold"
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config PM_UART_WAKEUP_FIFO_THRESHOLD_MODE
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bool "Wake-up triggered by the number of bytes received in the RX FIFO"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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config PM_UART_WAKEUP_START_BIT_MODE
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bool "Wake-up triggered by the detection of a start bit"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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config PM_UART_WAKEUP_CHAR_SEQ_MODE
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bool "Wake-up triggered by detecting a specific character sequence"
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depends on !ARCH_CHIP_ESP32C3_GENERIC
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endchoice # PM_UART_WAKEUP_MODE
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config PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD
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int "Number of RXD edge changes to to trigger wake-up"
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depends on PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD_MODE
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default 3
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config PM_UART_WAKEUP_FIFO_THRESHOLD
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int "Number of bytes needed to receive in the RX FIFO to trigger wake-up"
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depends on PM_UART_WAKEUP_FIFO_THRESHOLD_MODE
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default 8
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config PM_UART_WAKEUP_CHAR_SEQ
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string "Character sequence to trigger wake-up"
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depends on PM_UART_WAKEUP_CHAR_SEQ_MODE
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default "esp"
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endmenu # PM UART Wakeup Sources
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config PM_ALARM_SEC
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int "PM_STANDBY delay (seconds)"
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default 15
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---help---
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Number of seconds to wait in PM_STANDBY mode.
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config PM_ALARM_NSEC
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int "PM_STANDBY delay (nanoseconds)"
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default 0
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---help---
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Number of additional nanoseconds to wait in PM_STANDBY mode.
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endif # PM
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endmenu # PM Configuration
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menu "Peripheral Support"
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config ESPRESSIF_RTC
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@@ -183,9 +183,18 @@ ifeq ($(CONFIG_ESPRESSIF_USE_LP_CORE), y)
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CHIP_CSRCS += esp_ulp.c
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endif
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ifeq ($(CONFIG_PM),y)
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ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y)
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CHIP_CSRCS += esp_pm_initialize.c
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endif
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CHIP_CSRCS += esp_pm.c
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LDFLAGS += -u esp_timer_init_include_func
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endif
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# Required for initialization hooks on common code
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LDFLAGS += -u esp_system_include_startup_funcs
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ifeq ($(CONFIG_ESPRESSIF_EFUSE),y)
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LDFLAGS += -u esp_efuse_startup_include_func
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endif
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@@ -198,7 +207,7 @@ endif
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ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
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ifndef ESP_HAL_3RDPARTY_VERSION
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ESP_HAL_3RDPARTY_VERSION = 4eed03a15b2678a81dfd1ed0f3bde042b1fdd4c4
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ESP_HAL_3RDPARTY_VERSION = a4ffd506e8f77632b90b053b21a788b29191bd93
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endif
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ifndef ESP_HAL_3RDPARTY_URL
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@@ -30,10 +30,147 @@
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#include <nuttx/arch.h>
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#include <nuttx/board.h>
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#include <nuttx/power/pm.h>
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#include <nuttx/spinlock.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include "riscv_internal.h"
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#include "esp_pm.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Values for the RTC Alarm to wake up from the PM_STANDBY mode
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* (which corresponds to ESP32-C3 stop mode). If this alarm expires,
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* the logic in this file will wakeup from PM_STANDBY mode and
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* transition to PM_SLEEP mode (ESP32-C3 standby mode).
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
# ifndef CONFIG_PM_ALARM_SEC
|
||||
# define CONFIG_PM_ALARM_SEC 15
|
||||
# endif
|
||||
# ifndef CONFIG_PM_ALARM_NSEC
|
||||
# define CONFIG_PM_ALARM_NSEC 0
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static spinlock_t g_esp_idle_lock = SP_UNLOCKED;
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_idlepm
|
||||
*
|
||||
* Description:
|
||||
* Perform IDLE state power management.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static void up_idlepm(void)
|
||||
{
|
||||
irqstate_t flags;
|
||||
static enum pm_state_e oldstate = PM_NORMAL;
|
||||
enum pm_state_e newstate;
|
||||
int ret;
|
||||
int count;
|
||||
|
||||
count = pm_staycount(PM_IDLE_DOMAIN, PM_NORMAL);
|
||||
if (oldstate != PM_NORMAL && count == 0)
|
||||
{
|
||||
pm_stay(PM_IDLE_DOMAIN, PM_NORMAL);
|
||||
|
||||
/* Keep working in normal stage */
|
||||
|
||||
pm_changestate(PM_IDLE_DOMAIN, PM_NORMAL);
|
||||
newstate = PM_NORMAL;
|
||||
}
|
||||
|
||||
/* Decide, which power saving level can be obtained */
|
||||
|
||||
newstate = pm_checkstate(PM_IDLE_DOMAIN);
|
||||
|
||||
/* Check for state changes */
|
||||
|
||||
if (newstate != oldstate)
|
||||
{
|
||||
flags = spin_lock_irqsave(&g_esp_idle_lock);
|
||||
|
||||
/* Perform board-specific, state-dependent logic here */
|
||||
|
||||
_info("newstate= %d oldstate=%d\n", newstate, oldstate);
|
||||
|
||||
/* Then force the global state change */
|
||||
|
||||
ret = pm_changestate(PM_IDLE_DOMAIN, newstate);
|
||||
if (ret < 0)
|
||||
{
|
||||
/* The new state change failed, revert to the preceding state */
|
||||
|
||||
pm_changestate(PM_IDLE_DOMAIN, oldstate);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Save the new state */
|
||||
|
||||
oldstate = newstate;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&g_esp_idle_lock, flags);
|
||||
|
||||
/* MCU-specific power management logic */
|
||||
|
||||
switch (newstate)
|
||||
{
|
||||
case PM_NORMAL:
|
||||
break;
|
||||
|
||||
case PM_IDLE:
|
||||
break;
|
||||
|
||||
case PM_STANDBY:
|
||||
{
|
||||
/* Enter Force-sleep mode */
|
||||
|
||||
esp_pmstandby(CONFIG_PM_ALARM_SEC * 1000000 +
|
||||
CONFIG_PM_ALARM_NSEC / 1000);
|
||||
}
|
||||
break;
|
||||
|
||||
case PM_SLEEP:
|
||||
|
||||
/* Enter Deep-sleep mode */
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
# ifdef CONFIG_WATCHDOG
|
||||
/* Announce the power management state change to feed watchdog */
|
||||
|
||||
pm_changestate(PM_IDLE_DOMAIN, PM_NORMAL);
|
||||
# endif
|
||||
}
|
||||
}
|
||||
#else
|
||||
# define up_idlepm()
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
@@ -72,5 +209,9 @@ void up_idle(void)
|
||||
|
||||
asm("WFI");
|
||||
|
||||
/* Perform IDLE mode power management */
|
||||
|
||||
up_idlepm();
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
528
arch/risc-v/src/common/espressif/esp_pm.c
Normal file
528
arch/risc-v/src/common/espressif/esp_pm.c
Normal file
@@ -0,0 +1,528 @@
|
||||
/****************************************************************************
|
||||
* arch/risc-v/src/common/espressif/esp_pm.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/power/pm.h>
|
||||
|
||||
#include <debug.h>
|
||||
|
||||
#include "esp_pm.h"
|
||||
#ifdef CONFIG_SCHED_TICKLESS
|
||||
# include "esp_tickless.h"
|
||||
#endif
|
||||
#include "esp_sleep.h"
|
||||
#include "soc/rtc.h"
|
||||
#include "esp_sleep_internal.h"
|
||||
#include "esp_pmu.h"
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP
|
||||
# include "driver/rtc_io.h"
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP
|
||||
# include "driver/gpio.h"
|
||||
# include "espressif/esp_gpio.h"
|
||||
# include "hal/gpio_types.h"
|
||||
#endif
|
||||
#ifdef CONFIG_PM_UART_WAKEUP
|
||||
# include "driver/uart_wakeup.h"
|
||||
# include "hal/uart_types.h"
|
||||
# include "hal/uart_hal.h"
|
||||
# include "hal/uart_ll.h"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_ESP32C3_GENERIC) || \
|
||||
defined(CONFIG_ARCH_CHIP_ESP32C6)
|
||||
# define CHECK_VDD_SPI 1
|
||||
# if defined(CONFIG_ARCH_CHIP_ESP32C6)
|
||||
/* GPIO20 - GPIO26 are powered by VDD_SPI Powered */
|
||||
# define CHECK_VDD_SPI_PIN_MASKS 133169152
|
||||
# else
|
||||
/* GPIO19 - GPIO24 are powered by VDD_SPI Powered */
|
||||
# define CHECK_VDD_SPI_PIN_MASKS 33030144
|
||||
# endif /* CONFIG_ARCH_CHIP_ESP32C6 */
|
||||
#endif /* CONFIG_ARCH_CHIP_ESP32C3_GENERIC || CONFIG_ARCH_CHIP_ESP32C6 */
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/* Wakeup reasons string. */
|
||||
|
||||
const char *g_wakeup_reasons[] =
|
||||
{
|
||||
"undefined",
|
||||
"",
|
||||
"",
|
||||
"EXT1",
|
||||
"Timer",
|
||||
"",
|
||||
"ULP",
|
||||
"GPIO",
|
||||
"UART",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
""
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP
|
||||
/****************************************************************************
|
||||
* Name: esp_pm_get_ext1_io_mask
|
||||
*
|
||||
* Description:
|
||||
* Get ext1 IO mask value from configured wakeup pins.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* A 64-bit unsigned integer where each bit corresponds to an RTC GPIO pin
|
||||
* that has been configured as an ext1 wakeup source.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static uint64_t IRAM_ATTR esp_pm_get_ext1_io_mask(void)
|
||||
{
|
||||
uint64_t io_mask = 0;
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO0
|
||||
io_mask |= BIT(0);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO1
|
||||
io_mask |= BIT(1);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO2
|
||||
io_mask |= BIT(2);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO3
|
||||
io_mask |= BIT(3);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO4
|
||||
io_mask |= BIT(4);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO5
|
||||
io_mask |= BIT(5);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO6
|
||||
io_mask |= BIT(6);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO7
|
||||
io_mask |= BIT(7);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO8
|
||||
io_mask |= BIT(8);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO9
|
||||
io_mask |= BIT(9);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO10
|
||||
io_mask |= BIT(10);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO11
|
||||
io_mask |= BIT(11);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO12
|
||||
io_mask |= BIT(12);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO13
|
||||
io_mask |= BIT(13);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP_RTC_GPIO14
|
||||
io_mask |= BIT(14);
|
||||
#endif
|
||||
|
||||
return io_mask;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_pm_ext1_wakeup_prepare
|
||||
*
|
||||
* Description:
|
||||
* Configure ext1 gpios to use as wakeup source.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void IRAM_ATTR esp_pm_ext1_wakeup_prepare(void)
|
||||
{
|
||||
int pin_mask;
|
||||
uint64_t io_mask;
|
||||
# ifdef CONFIG_PM_EXT1_WAKEUP_TRIGGER_ANY_LOW
|
||||
esp_sleep_ext1_wakeup_mode_t level_mode = ESP_EXT1_WAKEUP_ANY_LOW;
|
||||
# else
|
||||
esp_sleep_ext1_wakeup_mode_t level_mode = ESP_EXT1_WAKEUP_ANY_HIGH;
|
||||
# endif /* CONFIG_PM_EXT1_WAKEUP */
|
||||
io_mask = esp_pm_get_ext1_io_mask();
|
||||
for (int i = 0; i < CONFIG_SOC_GPIO_PIN_COUNT; i++)
|
||||
{
|
||||
pin_mask = BIT(i);
|
||||
if ((io_mask & pin_mask) != 0)
|
||||
{
|
||||
esp_sleep_enable_ext1_wakeup_io(pin_mask, level_mode);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_PM_EXT1_WAKEUP */
|
||||
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP
|
||||
/****************************************************************************
|
||||
* Name: esp_pm_get_gpio_mask
|
||||
*
|
||||
* Description:
|
||||
* Get GPIO mask value from configured wakeup pins.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* A 64-bit unsigned integer where each bit corresponds to an GPIO pin
|
||||
* that has been configured as an GPIO wakeup source.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static uint64_t IRAM_ATTR esp_pm_get_gpio_mask(void)
|
||||
{
|
||||
uint64_t io_mask = 0;
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO0
|
||||
io_mask |= BIT(0);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO1
|
||||
io_mask |= BIT(1);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO2
|
||||
io_mask |= BIT(2);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO3
|
||||
io_mask |= BIT(3);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO4
|
||||
io_mask |= BIT(4);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO5
|
||||
io_mask |= BIT(5);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO6
|
||||
io_mask |= BIT(6);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO7
|
||||
io_mask |= BIT(7);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO8
|
||||
io_mask |= BIT(8);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO9
|
||||
io_mask |= BIT(9);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO10
|
||||
io_mask |= BIT(10);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO11
|
||||
io_mask |= BIT(11);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO12
|
||||
io_mask |= BIT(12);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO13
|
||||
io_mask |= BIT(13);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO14
|
||||
io_mask |= BIT(14);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO15
|
||||
io_mask |= BIT(15);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO16
|
||||
io_mask |= BIT(16);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO17
|
||||
io_mask |= BIT(17);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO18
|
||||
io_mask |= BIT(18);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO19
|
||||
io_mask |= BIT(19);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO20
|
||||
io_mask |= BIT(20);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO21
|
||||
io_mask |= BIT(21);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO22
|
||||
io_mask |= BIT(22);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO23
|
||||
io_mask |= BIT(23);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO24
|
||||
io_mask |= BIT(24);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO25
|
||||
io_mask |= BIT(25);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO26
|
||||
io_mask |= BIT(26);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO27
|
||||
io_mask |= BIT(27);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO28
|
||||
io_mask |= BIT(28);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO29
|
||||
io_mask |= BIT(29);
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP_GPIO30
|
||||
io_mask |= BIT(30);
|
||||
#endif
|
||||
|
||||
return io_mask;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_pm_gpio_wakeup_prepare
|
||||
*
|
||||
* Description:
|
||||
* Configure gpios to use as gpio wakeup source.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void IRAM_ATTR esp_pm_gpio_wakeup_prepare(void)
|
||||
{
|
||||
uint64_t mask_value = esp_pm_get_gpio_mask();
|
||||
int pin_mask = 0;
|
||||
# ifdef CONFIG_PM_GPIO_WAKEUP_TRIGGER_ANY_LOW
|
||||
gpio_int_type_t level_mode = GPIO_INTR_LOW_LEVEL;
|
||||
# else
|
||||
gpio_int_type_t level_mode = GPIO_INTR_HIGH_LEVEL;
|
||||
# endif /* CONFIG_PM_EXT1_WAKEUP */
|
||||
|
||||
for (int i = 0; i < CONFIG_SOC_GPIO_PIN_COUNT; i++)
|
||||
{
|
||||
pin_mask = BIT(i);
|
||||
if ((mask_value & pin_mask) != 0)
|
||||
{
|
||||
esp_configgpio(i, INPUT);
|
||||
gpio_wakeup_enable(i, level_mode);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CHECK_VDD_SPI
|
||||
if ((mask_value & CHECK_VDD_SPI_PIN_MASKS) != 0)
|
||||
{
|
||||
esp_sleep_pd_config(ESP_PD_DOMAIN_VDDSDIO, ESP_PD_OPTION_ON);
|
||||
}
|
||||
#endif /* CHECK_VDD_SPI */
|
||||
|
||||
esp_sleep_enable_gpio_wakeup();
|
||||
}
|
||||
#endif /* CONFIG_PM_GPIO_WAKEUP */
|
||||
|
||||
#ifdef CONFIG_PM_UART_WAKEUP
|
||||
/****************************************************************************
|
||||
* Name: esp_pm_uart_wakeup_prepare
|
||||
*
|
||||
* Description:
|
||||
* Configure UART wake-up mode
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void IRAM_ATTR esp_pm_uart_wakeup_prepare(void)
|
||||
{
|
||||
# if defined(CONFIG_PM_UART_WAKEUP_UART0)
|
||||
int uart_num = 0;
|
||||
# elif defined(CONFIG_PM_UART_WAKEUP_UART1)
|
||||
int uart_num = 1;
|
||||
# endif
|
||||
uart_wakeup_cfg_t wake_up_cfg =
|
||||
{
|
||||
#ifdef CONFIG_PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD_MODE
|
||||
.wakeup_mode = UART_WK_MODE_ACTIVE_THRESH,
|
||||
.rx_edge_threshold = CONFIG_PM_UART_WAKEUP_ACTIVE_EDGE_THRESHOLD
|
||||
#endif
|
||||
#ifdef CONFIG_PM_UART_WAKEUP_FIFO_THRESHOLD_MODE
|
||||
.wakeup_mode = UART_WK_MODE_FIFO_THRESH,
|
||||
.rx_fifo_threshold = CONFIG_PM_UART_WAKEUP_FIFO_THRESHOLD
|
||||
#endif
|
||||
#ifdef CONFIG_PM_UART_WAKEUP_START_BIT_MODE
|
||||
.wakeup_mode = UART_WK_MODE_START_BIT,
|
||||
#endif
|
||||
#ifdef CONFIG_PM_UART_WAKEUP_CHAR_SEQ_MODE
|
||||
.wakeup_mode = UART_WK_MODE_CHAR_SEQ,
|
||||
.wake_chars_seq = CONFIG_PM_UART_WAKEUP_CHAR_SEQ
|
||||
#endif
|
||||
};
|
||||
|
||||
uart_wakeup_setup(uart_num, &wake_up_cfg);
|
||||
esp_sleep_enable_uart_wakeup(uart_num);
|
||||
}
|
||||
#endif /* CONFIG_PM_UART_WAKEUP */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_pm_sleep_enable_timer_wakeup
|
||||
*
|
||||
* Description:
|
||||
* Configure wakeup interval
|
||||
*
|
||||
* Input Parameters:
|
||||
* time_in_us - Sleep duration in microseconds.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void esp_pm_sleep_enable_timer_wakeup(uint64_t time_in_us)
|
||||
{
|
||||
esp_sleep_enable_timer_wakeup(time_in_us);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_pm_light_sleep_start
|
||||
*
|
||||
* Description:
|
||||
* Enter light sleep mode
|
||||
*
|
||||
* Input Parameters:
|
||||
* sleep_time - Reference of uint64_t value to return actual sleep duration
|
||||
* in microseconds. Use NULL if not needed.
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success or a negated errno value if fails.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_pm_light_sleep_start(uint64_t *sleep_time)
|
||||
{
|
||||
int ret = OK;
|
||||
int sleep_start = rtc_time_get();
|
||||
int sleep_return = 0;
|
||||
|
||||
ret = esp_light_sleep_start();
|
||||
if (sleep_time != NULL)
|
||||
{
|
||||
sleep_return = rtc_time_get();
|
||||
*sleep_time = sleep_return - sleep_start;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_pmstandby
|
||||
*
|
||||
* Description:
|
||||
* Enter pm standby (light sleep) mode.
|
||||
*
|
||||
* Input Parameters:
|
||||
* time_in_us - The maximum time to sleep in microseconds.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_pmstandby(uint64_t time_in_us)
|
||||
{
|
||||
uint64_t rtc_diff_us;
|
||||
esp_sleep_wakeup_cause_t cause;
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP
|
||||
int64_t gpio_mask;
|
||||
#endif
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP
|
||||
int64_t ext1_mask;
|
||||
esp_pm_ext1_wakeup_prepare();
|
||||
#endif
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP
|
||||
esp_pm_gpio_wakeup_prepare();
|
||||
#endif
|
||||
#ifdef CONFIG_PM_ULP_WAKEUP
|
||||
esp_sleep_enable_ulp_wakeup();
|
||||
#endif
|
||||
#ifdef CONFIG_PM_UART_WAKEUP
|
||||
esp_pm_uart_wakeup_prepare();
|
||||
#endif /* CONFIG_PM_UART_WAKEUP */
|
||||
|
||||
esp_pm_sleep_enable_timer_wakeup(time_in_us);
|
||||
|
||||
esp_pm_light_sleep_start(&rtc_diff_us);
|
||||
|
||||
#ifdef CONFIG_SCHED_TICKLESS
|
||||
up_step_idletime((uint32_t)time_in_us);
|
||||
#endif
|
||||
|
||||
cause = esp_sleep_get_wakeup_cause();
|
||||
pwrinfo("Returned from light-sleep with: %s, slept for %" PRIu32 " ms\n",
|
||||
g_wakeup_reasons[cause],
|
||||
(uint32_t)(rtc_diff_us) / 1000);
|
||||
|
||||
#ifdef CONFIG_PM_EXT1_WAKEUP
|
||||
if (cause == ESP_SLEEP_WAKEUP_EXT1)
|
||||
{
|
||||
ext1_mask = esp_sleep_get_ext1_wakeup_status();
|
||||
pwrinfo("EXT1 wakeup mask: %" PRIu64 "\n", ext1_mask);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM_GPIO_WAKEUP
|
||||
if (cause == ESP_SLEEP_WAKEUP_GPIO)
|
||||
{
|
||||
gpio_mask = esp_sleep_get_gpio_wakeup_status();
|
||||
pwrinfo("GPIO wakeup mask: %" PRIu64 "\n", gpio_mask);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
93
arch/risc-v/src/common/espressif/esp_pm.h
Normal file
93
arch/risc-v/src/common/espressif/esp_pm.h
Normal file
@@ -0,0 +1,93 @@
|
||||
/****************************************************************************
|
||||
* arch/risc-v/src/common/espressif/esp_pm.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_RISC_V_SRC_COMMON_ESPRESSIF_ESP_PM_H
|
||||
#define __ARCH_RISC_V_SRC_COMMON_ESPRESSIF_ESP_PM_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_pm_light_sleep_start
|
||||
*
|
||||
* Description:
|
||||
* Enter light sleep mode
|
||||
*
|
||||
* Input Parameters:
|
||||
* sleep_time - Reference of uint64_t value to return actual sleep duration
|
||||
* in microseconds. Use NULL if not needed.
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success or a negated errno value if fails.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int esp_pm_light_sleep_start(uint64_t *sleep_time);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_pmstandby
|
||||
*
|
||||
* Description:
|
||||
* Enter pm standby (light sleep) mode.
|
||||
*
|
||||
* Input Parameters:
|
||||
* time_in_us - The maximum time to sleep in microseconds.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_pmstandby(uint64_t time_in_us);
|
||||
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#undef EXTERN
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_RISC_V_SRC_COMMON_ESPRESSIF_ESP_PM_H */
|
||||
45
arch/risc-v/src/common/espressif/esp_pm_initialize.c
Normal file
45
arch/risc-v/src/common/espressif/esp_pm_initialize.c
Normal file
@@ -0,0 +1,45 @@
|
||||
/****************************************************************************
|
||||
* arch/risc-v/src/common/espressif/esp_pm_initialize.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/power/pm.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: riscv_pminitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the power management subsystem.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void riscv_pminitialize(void)
|
||||
{
|
||||
/* Initialize the NuttX power management subsystem proper */
|
||||
|
||||
pm_initialize();
|
||||
}
|
||||
@@ -57,10 +57,7 @@
|
||||
#include "soc/reg_base.h"
|
||||
#include "spi_flash_mmap.h"
|
||||
#include "rom/cache.h"
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_ESP32H2
|
||||
#include "soc/rtc.h"
|
||||
#endif
|
||||
|
||||
#include "bootloader_init.h"
|
||||
|
||||
@@ -409,14 +406,17 @@ static int map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_ESP32H2
|
||||
#if defined(CONFIG_ARCH_CHIP_ESP32C6) || defined(CONFIG_ARCH_CHIP_ESP32H2)
|
||||
static void IRAM_ATTR NOINLINE_ATTR recalib_bbpll(void)
|
||||
{
|
||||
rtc_cpu_freq_config_t old_config;
|
||||
rtc_clk_cpu_freq_get_config(&old_config);
|
||||
|
||||
if (old_config.source == SOC_CPU_CLK_SRC_PLL ||
|
||||
old_config.source == SOC_CPU_CLK_SRC_FLASH_PLL)
|
||||
if (old_config.source == SOC_CPU_CLK_SRC_PLL
|
||||
#ifdef CONFIG_ARCH_CHIP_ESP32H2
|
||||
|| old_config.source == SOC_CPU_CLK_SRC_FLASH_PLL
|
||||
#endif
|
||||
)
|
||||
{
|
||||
rtc_clk_cpu_freq_set_xtal();
|
||||
rtc_clk_cpu_freq_set_config(&old_config);
|
||||
@@ -490,6 +490,10 @@ void __esp_start(void)
|
||||
esp_cpu_configure_region_protection();
|
||||
#endif
|
||||
|
||||
/* Configure the power related stuff. */
|
||||
|
||||
esp_rtc_init();
|
||||
|
||||
/* Configure SPI Flash chip state */
|
||||
|
||||
spi_flash_init_chip_state();
|
||||
|
||||
@@ -26,6 +26,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_uart$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
|
||||
@@ -51,6 +52,9 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom
|
||||
@@ -63,6 +67,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)public_compat
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
|
||||
@@ -79,6 +84,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)spi_flash
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
|
||||
|
||||
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
|
||||
@@ -120,10 +126,13 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efus
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)dma$(DELIM)gdma.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_memory_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
|
||||
@@ -141,6 +150,9 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)brownout.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_console.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_event.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_mmu_map.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)ext_mem_layout.c
|
||||
@@ -155,6 +167,9 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)system_time.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)brownout_hal.c
|
||||
@@ -189,6 +204,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)xt_wdt_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_cntl_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
|
||||
@@ -197,6 +213,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)util.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)newlib$(DELIM)src$(DELIM)port$(DELIM)esp_time_impl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_intc.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_noos.c
|
||||
@@ -233,6 +250,10 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)twai_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)${CHIP_SERIES}$(DELIM)uart_periph.c
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)rtc_io.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_uart$(DELIM)src$(DELIM)uart_wakeup.c
|
||||
|
||||
# Bootloader files
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
|
||||
|
||||
@@ -26,6 +26,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_uart$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
|
||||
@@ -87,6 +88,12 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$(DELIM)ulp_common$(DELIM)include
|
||||
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)private_include
|
||||
|
||||
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)spi_flash
|
||||
@@ -108,6 +115,8 @@ ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.spiflash.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.wdt.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.heap.ld
|
||||
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
|
||||
ifeq ($(CONFIG_ESPRESSIF_USE_LP_CORE),y)
|
||||
@@ -132,16 +141,28 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efus
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)dma$(DELIM)gdma.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_memory_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)modem_clock.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_console.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_event.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modes.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modem.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_retention.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_system_peripheral.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_clock.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)pau_regdma.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)regdma_link.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)io_mux.c
|
||||
@@ -170,6 +191,9 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)system_time.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)apm_hal.c
|
||||
@@ -209,6 +233,8 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)modem_clock_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)pau_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
|
||||
@@ -217,6 +243,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)util.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)newlib$(DELIM)src$(DELIM)port$(DELIM)esp_time_impl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_plic.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)rv_utils.c
|
||||
@@ -258,6 +285,9 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)ulp$
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)rtc_io.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_uart$(DELIM)src$(DELIM)uart_wakeup.c
|
||||
|
||||
CHIP_ASRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)esp32c6$(DELIM)sleep_cpu_asm.S
|
||||
|
||||
# Bootloader files
|
||||
|
||||
|
||||
@@ -26,6 +26,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_uart$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
|
||||
@@ -61,6 +62,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)public_compat
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
|
||||
@@ -68,6 +70,7 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)newlib$(DELIM)priv_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
@@ -76,6 +79,8 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)spi_flash
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)driver$(DELIM)twai$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)driver$(DELIM)spi$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
|
||||
|
||||
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
|
||||
@@ -97,6 +102,7 @@ ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.wdt.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.heap.ld
|
||||
|
||||
# Source files
|
||||
|
||||
@@ -118,19 +124,33 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)dma$(DELIM)gdma.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_memory_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)modem_clock.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_console.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_event.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modes.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modem.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_retention.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_system_peripheral.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_clock.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)mspi_timing_tuning.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)regdma_link.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)pau_regdma.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_param.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_sleep.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
|
||||
@@ -149,6 +169,9 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)system_time.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)apm_hal.c
|
||||
@@ -186,6 +209,8 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)modem_clock_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)pau_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
|
||||
@@ -194,6 +219,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)util.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)newlib$(DELIM)src$(DELIM)port$(DELIM)esp_time_impl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_plic.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)rv_utils.c
|
||||
@@ -209,6 +235,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)i2c_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)i2s_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)mcpwm_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_io_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)spi_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)timer_periph.c
|
||||
@@ -228,6 +255,12 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_brownout_hook.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)cache_utils.c
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)rtc_io.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_uart$(DELIM)src$(DELIM)uart_wakeup.c
|
||||
|
||||
CHIP_ASRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)lowpower$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sleep_cpu_asm.S
|
||||
|
||||
# Bootloader files
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
|
||||
|
||||
Reference in New Issue
Block a user