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x86_64: fix bootup problem in SMP
We need to initialize the per - CPU registers as early as possible. Signed-off-by: hujun5 <hujun5@xiaomi.com>
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@@ -366,14 +366,7 @@ bool x86_64_cpu_ready_get(uint8_t cpu)
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uint8_t x86_64_cpu_count_get(void)
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{
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irqstate_t flags;
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uint8_t count;
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flags = spin_lock_irqsave(&g_ap_boot);
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count = g_cpu_count;
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spin_unlock_irqrestore(&g_ap_boot, flags);
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return count;
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return g_cpu_count;
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}
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/****************************************************************************
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@@ -425,10 +418,4 @@ void x86_64_cpu_priv_set(uint8_t cpu)
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write_msr(MSR_FMASK, X86_64_RFLAGS_IF | X86_64_RFLAGS_DF);
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#endif
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#ifdef CONFIG_SMP
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/* Attach TLB shootdown handler */
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irq_attach(SMP_IPI_TLBSHOOTDOWN_IRQ, x86_64_tlb_handler, NULL);
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#endif
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}
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@@ -154,6 +154,7 @@ void x86_64_ap_boot(void)
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tcb = current_task(cpu);
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UNUSED(tcb);
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up_update_task(tcb);
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#ifdef CONFIG_SCHED_THREAD_LOCAL
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/* Make sure that FS_BASE is not null */
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@@ -212,8 +213,6 @@ void x86_64_ap_boot(void)
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x86_64_hwdebug_init();
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#endif
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up_update_task(tcb);
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/* Then transfer control to the IDLE task */
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nx_idle_trampoline();
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@@ -544,6 +544,12 @@ void up_irqinitialize(void)
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irq_attach(ISR13, x86_64_fault_panic_isr, NULL);
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irq_attach(ISR14, x86_64_fault_panic_isr, NULL);
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irq_attach(ISR16, x86_64_fault_kill_isr, NULL);
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#ifdef CONFIG_SMP
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/* Attach TLB shootdown handler */
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irq_attach(SMP_IPI_TLBSHOOTDOWN_IRQ, x86_64_tlb_handler, NULL);
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#endif
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}
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/****************************************************************************
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