x86_64: fix bootup problem in SMP

We need to initialize the per - CPU registers as early as possible.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
This commit is contained in:
hujun5
2025-02-11 17:41:19 +08:00
committed by Alin Jerpelea
parent 2e9a43571a
commit 9461c70fcd
3 changed files with 8 additions and 16 deletions

View File

@@ -366,14 +366,7 @@ bool x86_64_cpu_ready_get(uint8_t cpu)
uint8_t x86_64_cpu_count_get(void)
{
irqstate_t flags;
uint8_t count;
flags = spin_lock_irqsave(&g_ap_boot);
count = g_cpu_count;
spin_unlock_irqrestore(&g_ap_boot, flags);
return count;
return g_cpu_count;
}
/****************************************************************************
@@ -425,10 +418,4 @@ void x86_64_cpu_priv_set(uint8_t cpu)
write_msr(MSR_FMASK, X86_64_RFLAGS_IF | X86_64_RFLAGS_DF);
#endif
#ifdef CONFIG_SMP
/* Attach TLB shootdown handler */
irq_attach(SMP_IPI_TLBSHOOTDOWN_IRQ, x86_64_tlb_handler, NULL);
#endif
}

View File

@@ -154,6 +154,7 @@ void x86_64_ap_boot(void)
tcb = current_task(cpu);
UNUSED(tcb);
up_update_task(tcb);
#ifdef CONFIG_SCHED_THREAD_LOCAL
/* Make sure that FS_BASE is not null */
@@ -212,8 +213,6 @@ void x86_64_ap_boot(void)
x86_64_hwdebug_init();
#endif
up_update_task(tcb);
/* Then transfer control to the IDLE task */
nx_idle_trampoline();

View File

@@ -544,6 +544,12 @@ void up_irqinitialize(void)
irq_attach(ISR13, x86_64_fault_panic_isr, NULL);
irq_attach(ISR14, x86_64_fault_panic_isr, NULL);
irq_attach(ISR16, x86_64_fault_kill_isr, NULL);
#ifdef CONFIG_SMP
/* Attach TLB shootdown handler */
irq_attach(SMP_IPI_TLBSHOOTDOWN_IRQ, x86_64_tlb_handler, NULL);
#endif
}
/****************************************************************************