mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2025-12-16 12:55:26 +08:00
Raspberry Pi implementation for the RTEMS GPIO API.
Added support for the new RTEMS GPIO API functions. Test cases can be found in https://github.com/asuol/RTEMS_rpi_testing/tree/master/GPIO
This commit is contained in:
committed by
Gedare Bloom
parent
87f8b01f58
commit
61e7c698a4
@@ -44,6 +44,7 @@ include_bsp_HEADERS += include/irq.h
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include_bsp_HEADERS += include/mmu.h
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include_bsp_HEADERS += include/usart.h
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include_bsp_HEADERS += include/raspberrypi.h
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include_bsp_HEADERS += include/rpi-gpio.h
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include_libcpu_HEADERS = ../../../libcpu/arm/shared/include/cache_.h \
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../../../libcpu/arm/shared/include/arm-cp15.h
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@@ -86,6 +87,7 @@ libbsp_a_SOURCES += ../../shared/cpucounterdiff.c
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libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c
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libbsp_a_SOURCES += ../../shared/sbrk.c
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libbsp_a_SOURCES += ../../shared/src/stackalloc.c
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libbsp_a_SOURCES += ../../shared/gpio.c
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libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
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libbsp_a_SOURCES += ../shared/arm-cp15-set-ttb-entries.c
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@@ -117,6 +119,9 @@ libbsp_a_SOURCES += clock/clockdrv.c ../../../shared/clockdrv_shell.h
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# Timer
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libbsp_a_SOURCES += misc/timer.c
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# GPIO
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libbsp_a_SOURCES += gpio/rpi-gpio.c
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# RTC
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# SSP
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136
c/src/lib/libbsp/arm/raspberrypi/gpio/gpio-interfaces-pi1-rev2.c
Normal file
136
c/src/lib/libbsp/arm/raspberrypi/gpio/gpio-interfaces-pi1-rev2.c
Normal file
@@ -0,0 +1,136 @@
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/**
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* @file gpio-interfaces-pi1-rev2.c
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*
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* @ingroup raspberrypi_gpio
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*
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* @brief Raspberry PI 1 rev2 GPIO interface definitions.
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*/
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/*
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* Copyright (c) 2015 Andre Marques <andre.lousa.marques at gmail.com>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#define JTAG_PIN_COUNT 5
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#define SPI_PIN_COUNT 5
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#define I2C_PIN_COUNT 2
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const rtems_gpio_pin_conf jtag_config[JTAG_PIN_COUNT] = {
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{ /*arm_tdi */
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.pin_number = 4,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[5]
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},
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{ /* arm_trst */
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.pin_number = 22,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[4]
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},
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{ /* arm_tdo */
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.pin_number = 24,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[4]
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},
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{ /* arm_tck */
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.pin_number = 25,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[4]
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},
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{ /* arm_tms */
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.pin_number = 27,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[4]
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}
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};
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const rtems_gpio_pin_conf spi_config[SPI_PIN_COUNT] = {
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{ /* spi_miso */
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.pin_number = 7,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[0]
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},
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{ /* spi_mosi */
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.pin_number = 8,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[0]
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},
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{ /* spi_sclk */
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.pin_number = 9,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[0]
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},
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{ /* spi_ce_0 */
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.pin_number = 10,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[0]
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},
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{ /* spi_ce_1 */
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.pin_number = 11,
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.function = BSP_SPECIFIC,
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.pull_mode = NO_PULL_RESISTOR,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[0]
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}
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};
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const rtems_gpio_pin_conf i2c_config[I2C_PIN_COUNT] = {
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{ /* i2c_sda */
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.pin_number = 2,
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.function = BSP_SPECIFIC,
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.pull_mode = PULL_UP,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[0]
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},
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{ /* i2c_scl */
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.pin_number = 3,
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.function = BSP_SPECIFIC,
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.pull_mode = PULL_UP,
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.interrupt = NULL,
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.output_enabled = FALSE,
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.logic_invert = FALSE,
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.bsp_specific = &alt_func_def[0]
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}
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};
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329
c/src/lib/libbsp/arm/raspberrypi/gpio/rpi-gpio.c
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329
c/src/lib/libbsp/arm/raspberrypi/gpio/rpi-gpio.c
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@@ -0,0 +1,329 @@
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/**
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* @file rpi-gpio.c
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*
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* @ingroup raspberrypi_gpio
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*
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* @brief Support for the Raspberry PI GPIO.
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*/
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/*
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* Copyright (c) 2014-2015 Andre Marques <andre.lousa.marques at gmail.com>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#include <bsp/raspberrypi.h>
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#include <bsp/irq-generic.h>
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#include <bsp/gpio.h>
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#include <bsp/rpi-gpio.h>
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#include <stdlib.h>
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/* Calculates a bitmask to assign an alternate function to a given pin. */
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#define SELECT_PIN_FUNCTION(fn, pn) (fn << ((pn % 10) * 3))
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rtems_gpio_specific_data alt_func_def[] = {
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{.io_function = RPI_ALT_FUNC_0, .pin_data = NULL},
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{.io_function = RPI_ALT_FUNC_1, .pin_data = NULL},
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{.io_function = RPI_ALT_FUNC_2, .pin_data = NULL},
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{.io_function = RPI_ALT_FUNC_3, .pin_data = NULL},
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{.io_function = RPI_ALT_FUNC_4, .pin_data = NULL},
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{.io_function = RPI_ALT_FUNC_5, .pin_data = NULL}
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};
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/* Raspberry Pi 1 Revision 2 gpio interface definitions. */
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#include "gpio-interfaces-pi1-rev2.c"
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/* Waits a number of CPU cycles. */
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static void arm_delay(uint8_t cycles)
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{
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uint8_t i;
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for ( i = 0; i < cycles; ++i ) {
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asm volatile("nop");
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}
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}
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static rtems_status_code rpi_select_pin_function(
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uint32_t bank,
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uint32_t pin,
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uint32_t type
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) {
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/* Calculate the pin function select register address. */
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volatile unsigned int *pin_addr = (unsigned int *) BCM2835_GPIO_REGS_BASE +
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(pin / 10);
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if ( type == RPI_DIGITAL_IN ) {
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*(pin_addr) &= ~SELECT_PIN_FUNCTION(RPI_DIGITAL_IN, pin);
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}
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else {
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*(pin_addr) |= SELECT_PIN_FUNCTION(type, pin);
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}
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code rtems_gpio_bsp_multi_set(uint32_t bank, uint32_t bitmask)
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{
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BCM2835_REG(BCM2835_GPIO_GPSET0) = bitmask;
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code rtems_gpio_bsp_multi_clear(uint32_t bank, uint32_t bitmask)
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{
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BCM2835_REG(BCM2835_GPIO_GPCLR0) = bitmask;
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return RTEMS_SUCCESSFUL;
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}
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uint32_t rtems_gpio_bsp_multi_read(uint32_t bank, uint32_t bitmask)
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{
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return (BCM2835_REG(BCM2835_GPIO_GPLEV0) & bitmask);
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}
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rtems_status_code rtems_gpio_bsp_set(uint32_t bank, uint32_t pin)
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{
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BCM2835_REG(BCM2835_GPIO_GPSET0) = (1 << pin);
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code rtems_gpio_bsp_clear(uint32_t bank, uint32_t pin)
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{
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BCM2835_REG(BCM2835_GPIO_GPCLR0) = (1 << pin);
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return RTEMS_SUCCESSFUL;
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}
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uint8_t rtems_gpio_bsp_get_value(uint32_t bank, uint32_t pin)
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{
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return (BCM2835_REG(BCM2835_GPIO_GPLEV0) & (1 << pin));
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}
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rtems_status_code rtems_gpio_bsp_select_input(
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uint32_t bank,
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uint32_t pin,
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void *bsp_specific
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) {
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return rpi_select_pin_function(bank, pin, RPI_DIGITAL_IN);
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}
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rtems_status_code rtems_gpio_bsp_select_output(
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uint32_t bank,
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uint32_t pin,
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void *bsp_specific
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) {
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return rpi_select_pin_function(bank, pin, RPI_DIGITAL_OUT);
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}
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rtems_status_code rtems_bsp_select_specific_io(
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uint32_t bank,
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uint32_t pin,
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uint32_t function,
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void *pin_data
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) {
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return rpi_select_pin_function(bank, pin, function);
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}
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rtems_status_code rtems_gpio_bsp_set_resistor_mode(
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uint32_t bank,
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uint32_t pin,
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rtems_gpio_pull_mode mode
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) {
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/* Set control signal. */
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switch ( mode ) {
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case PULL_UP:
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BCM2835_REG(BCM2835_GPIO_GPPUD) = (1 << 1);
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break;
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case PULL_DOWN:
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BCM2835_REG(BCM2835_GPIO_GPPUD) = (1 << 0);
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break;
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case NO_PULL_RESISTOR:
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BCM2835_REG(BCM2835_GPIO_GPPUD) = 0;
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break;
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default:
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return RTEMS_UNSATISFIED;
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}
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/* Wait 150 cyles, as per BCM2835 documentation. */
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arm_delay(150);
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/* Setup clock for the control signal. */
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BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = (1 << pin);
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arm_delay(150);
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/* Remove the control signal. */
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BCM2835_REG(BCM2835_GPIO_GPPUD) = 0;
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/* Remove the clock. */
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BCM2835_REG(BCM2835_GPIO_GPPUDCLK0) = 0;
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return RTEMS_SUCCESSFUL;
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}
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rtems_vector_number rtems_gpio_bsp_get_vector(uint32_t bank)
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{
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return BCM2835_IRQ_ID_GPIO_0;
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}
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uint32_t rtems_gpio_bsp_interrupt_line(rtems_vector_number vector)
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{
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uint32_t event_status;
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/* Retrieve the interrupt event status. */
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event_status = BCM2835_REG(BCM2835_GPIO_GPEDS0);
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/* Clear the interrupt line. */
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BCM2835_REG(BCM2835_GPIO_GPEDS0) = event_status;
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return event_status;
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}
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rtems_status_code rtems_bsp_enable_interrupt(
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uint32_t bank,
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uint32_t pin,
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rtems_gpio_interrupt interrupt
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) {
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switch ( interrupt ) {
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case FALLING_EDGE:
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/* Enables asynchronous falling edge detection. */
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BCM2835_REG(BCM2835_GPIO_GPAFEN0) |= (1 << pin);
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break;
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case RISING_EDGE:
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/* Enables asynchronous rising edge detection. */
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BCM2835_REG(BCM2835_GPIO_GPAREN0) |= (1 << pin);
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break;
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case BOTH_EDGES:
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/* Enables asynchronous falling edge detection. */
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BCM2835_REG(BCM2835_GPIO_GPAFEN0) |= (1 << pin);
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/* Enables asynchronous rising edge detection. */
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BCM2835_REG(BCM2835_GPIO_GPAREN0) |= (1 << pin);
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break;
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case LOW_LEVEL:
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/* Enables pin low level detection. */
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BCM2835_REG(BCM2835_GPIO_GPLEN0) |= (1 << pin);
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break;
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case HIGH_LEVEL:
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/* Enables pin high level detection. */
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BCM2835_REG(BCM2835_GPIO_GPHEN0) |= (1 << pin);
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break;
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case BOTH_LEVELS:
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/* Enables pin low level detection. */
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BCM2835_REG(BCM2835_GPIO_GPLEN0) |= (1 << pin);
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/* Enables pin high level detection. */
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BCM2835_REG(BCM2835_GPIO_GPHEN0) |= (1 << pin);
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break;
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case NONE:
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default:
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return RTEMS_UNSATISFIED;
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}
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code rtems_bsp_disable_interrupt(
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uint32_t bank,
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uint32_t pin,
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rtems_gpio_interrupt interrupt
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) {
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switch ( interrupt ) {
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case FALLING_EDGE:
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/* Disables asynchronous falling edge detection. */
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BCM2835_REG(BCM2835_GPIO_GPAFEN0) &= ~(1 << pin);
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break;
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case RISING_EDGE:
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/* Disables asynchronous rising edge detection. */
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BCM2835_REG(BCM2835_GPIO_GPAREN0) &= ~(1 << pin);
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break;
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case BOTH_EDGES:
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/* Disables asynchronous falling edge detection. */
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BCM2835_REG(BCM2835_GPIO_GPAFEN0) &= ~(1 << pin);
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/* Disables asynchronous rising edge detection. */
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BCM2835_REG(BCM2835_GPIO_GPAREN0) &= ~(1 << pin);
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break;
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case LOW_LEVEL:
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/* Disables pin low level detection. */
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BCM2835_REG(BCM2835_GPIO_GPLEN0) &= ~(1 << pin);
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break;
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case HIGH_LEVEL:
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/* Disables pin high level detection. */
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BCM2835_REG(BCM2835_GPIO_GPHEN0) &= ~(1 << pin);
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break;
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case BOTH_LEVELS:
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/* Disables pin low level detection. */
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BCM2835_REG(BCM2835_GPIO_GPLEN0) &= ~(1 << pin);
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/* Disables pin high level detection. */
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BCM2835_REG(BCM2835_GPIO_GPHEN0) &= ~(1 << pin);
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break;
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case NONE:
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default:
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return RTEMS_UNSATISFIED;
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}
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return RTEMS_SUCCESSFUL;
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}
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rtems_status_code rpi_gpio_select_jtag(void)
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{
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return rtems_gpio_multi_select(jtag_config, JTAG_PIN_COUNT);
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}
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rtems_status_code rpi_gpio_select_spi(void)
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{
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return rtems_gpio_multi_select(spi_config, SPI_PIN_COUNT);
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}
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rtems_status_code rpi_gpio_select_i2c(void)
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{
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return rtems_gpio_multi_select(i2c_config, I2C_PIN_COUNT);
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}
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|
||||
rtems_status_code rtems_gpio_bsp_multi_select(
|
||||
rtems_gpio_multiple_pin_select *pins,
|
||||
uint32_t pin_count,
|
||||
uint32_t select_bank
|
||||
) {
|
||||
uint32_t register_address;
|
||||
uint32_t select_register;
|
||||
uint8_t i;
|
||||
|
||||
register_address = BCM2835_GPIO_REGS_BASE + (select_bank * 0x04);
|
||||
|
||||
select_register = BCM2835_REG(register_address);
|
||||
|
||||
for ( i = 0; i < pin_count; ++i ) {
|
||||
if ( pins[i].function == DIGITAL_INPUT ) {
|
||||
select_register &=
|
||||
~SELECT_PIN_FUNCTION(RPI_DIGITAL_IN, pins[i].pin_number);
|
||||
}
|
||||
else if ( pins[i].function == DIGITAL_OUTPUT ) {
|
||||
select_register |=
|
||||
SELECT_PIN_FUNCTION(RPI_DIGITAL_OUT, pins[i].pin_number);
|
||||
}
|
||||
else { /* BSP_SPECIFIC function. */
|
||||
select_register |=
|
||||
SELECT_PIN_FUNCTION(pins[i].io_function, pins[i].pin_number);
|
||||
}
|
||||
}
|
||||
|
||||
BCM2835_REG(register_address) = select_register;
|
||||
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
rtems_status_code rtems_gpio_bsp_specific_group_operation(
|
||||
uint32_t bank,
|
||||
uint32_t *pins,
|
||||
uint32_t pin_count,
|
||||
void *arg
|
||||
) {
|
||||
return RTEMS_NOT_DEFINED;
|
||||
}
|
||||
@@ -33,6 +33,10 @@ extern "C" {
|
||||
|
||||
#define BSP_FEATURE_IRQ_EXTENSION
|
||||
|
||||
#define BSP_GPIO_PIN_COUNT 32
|
||||
#define BSP_GPIO_PINS_PER_BANK 32
|
||||
#define BSP_GPIO_PINS_PER_SELECT_BANK 10
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @file raspberrypi.h
|
||||
*
|
||||
* @ingroup raspberrypi_reg
|
||||
*
|
||||
@@ -8,7 +7,8 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2013 Alan Cudmore.
|
||||
* Copyright (c) 2014 Andre Marques <andre.lousa.marques at gmail.com>
|
||||
* Copyright (c) 2013 Alan Cudmore.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
@@ -93,8 +93,16 @@
|
||||
#define BCM2835_GPIO_GPFSEL1 (BCM2835_GPIO_REGS_BASE+0x04)
|
||||
#define BCM2835_GPIO_GPSET0 (BCM2835_GPIO_REGS_BASE+0x1C)
|
||||
#define BCM2835_GPIO_GPCLR0 (BCM2835_GPIO_REGS_BASE+0x28)
|
||||
#define BCM2835_GPIO_GPLEV0 (BCM2835_GPIO_REGS_BASE+0x34)
|
||||
#define BCM2835_GPIO_GPEDS0 (BCM2835_GPIO_REGS_BASE+0x40)
|
||||
#define BCM2835_GPIO_GPREN0 (BCM2835_GPIO_REGS_BASE+0x4C)
|
||||
#define BCM2835_GPIO_GPFEN0 (BCM2835_GPIO_REGS_BASE+0x58)
|
||||
#define BCM2835_GPIO_GPHEN0 (BCM2835_GPIO_REGS_BASE+0x64)
|
||||
#define BCM2835_GPIO_GPLEN0 (BCM2835_GPIO_REGS_BASE+0x70)
|
||||
#define BCM2835_GPIO_GPAREN0 (BCM2835_GPIO_REGS_BASE+0x7C)
|
||||
#define BCM2835_GPIO_GPAFEN0 (BCM2835_GPIO_REGS_BASE+0x88)
|
||||
#define BCM2835_GPIO_GPPUD (BCM2835_GPIO_REGS_BASE+0x94)
|
||||
#define BCM2835_GPIO_GPPUDCLK0 (BCM2835_GPIO_REGS_BASE+0x98)
|
||||
#define BCM2835_GPIO_GPPUDCLK0 (BCM2835_GPIO_REGS_BASE+0x98)
|
||||
|
||||
/** @} */
|
||||
|
||||
@@ -121,14 +129,12 @@
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* @name UART 0 (PL011) Registers
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
#define BCM2835_UART0_BASE (RPI_PERIPHERAL_BASE + 0x201000)
|
||||
|
||||
#define BCM2835_UART0_DR (BCM2835_UART0_BASE+0x00)
|
||||
@@ -159,9 +165,68 @@
|
||||
#define BCM2835_UART0_ICR_RX 0x10
|
||||
#define BCM2835_UART0_ICR_TX 0x20
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name I2C (BSC) Registers
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BCM2835_I2C_BASE (0x20804000)
|
||||
|
||||
#define BCM2835_I2C_C (BCM2835_I2C_BASE+0x00)
|
||||
#define BCM2835_I2C_S (BCM2835_I2C_BASE+0x04)
|
||||
#define BCM2835_I2C_DLEN (BCM2835_I2C_BASE+0x08)
|
||||
#define BCM2835_I2C_A (BCM2835_I2C_BASE+0x0C)
|
||||
#define BCM2835_I2C_FIFO (BCM2835_I2C_BASE+0x10)
|
||||
#define BCM2835_I2C_DIV (BCM2835_I2C_BASE+0x14)
|
||||
#define BCM2835_I2C_DEL (BCM2835_I2C_BASE+0x18)
|
||||
#define BCM2835_I2C_CLKT (BCM2835_I2C_BASE+0x1C)
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name SPI Registers
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BCM2835_SPI_BASE (0x20204000)
|
||||
|
||||
#define BCM2835_SPI_CS (BCM2835_SPI_BASE+0x00)
|
||||
#define BCM2835_SPI_FIFO (BCM2835_SPI_BASE+0x04)
|
||||
#define BCM2835_SPI_CLK (BCM2835_SPI_BASE+0x08)
|
||||
#define BCM2835_SPI_DLEN (BCM2835_SPI_BASE+0x0C)
|
||||
#define BCM2835_SPI_LTOH (BCM2835_SPI_BASE+0x10)
|
||||
#define BCM2835_SPI_DC (BCM2835_SPI_BASE+0x14)
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name I2C/SPI slave BSC Registers
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BCM2835_I2C_SPI_BASE (0x20214000)
|
||||
|
||||
#define BCM2835_I2C_SPI_DR (BCM2835_I2C_SPI_BASE+0x00)
|
||||
#define BCM2835_I2C_SPI_RSR (BCM2835_I2C_SPI_BASE+0x04)
|
||||
#define BCM2835_I2C_SPI_SLV (BCM2835_I2C_SPI_BASE+0x08)
|
||||
#define BCM2835_I2C_SPI_CR (BCM2835_I2C_SPI_BASE+0x0C)
|
||||
#define BCM2835_I2C_SPI_FR (BCM2835_I2C_SPI_BASE+0x10)
|
||||
#define BCM2835_I2C_SPI_IFLS (BCM2835_I2C_SPI_BASE+0x14)
|
||||
#define BCM2835_I2C_SPI_IMSC (BCM2835_I2C_SPI_BASE+0x18)
|
||||
#define BCM2835_I2C_SPI_RIS (BCM2835_I2C_SPI_BASE+0x1C)
|
||||
#define BCM2835_I2C_SPI_MIS (BCM2835_I2C_SPI_BASE+0x20)
|
||||
#define BCM2835_I2C_SPI_ICR (BCM2835_I2C_SPI_BASE+0x24)
|
||||
#define BCM2835_I2C_SPI_DMACR (BCM2835_I2C_SPI_BASE+0x28)
|
||||
#define BCM2835_I2C_SPI_TDR (BCM2835_I2C_SPI_BASE+0x2C)
|
||||
#define BCM2835_I2C_SPI_GPUSTAT (BCM2835_I2C_SPI_BASE+0x30)
|
||||
#define BCM2835_I2C_SPI_HCTRL (BCM2835_I2C_SPI_BASE+0x34)
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name IRQ Registers
|
||||
@@ -184,7 +249,6 @@
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* @name GPU Timer Registers
|
||||
*
|
||||
@@ -208,7 +272,6 @@
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* LIBBSP_ARM_RASPBERRYPI_RASPBERRYPI_H */
|
||||
|
||||
69
c/src/lib/libbsp/arm/raspberrypi/include/rpi-gpio.h
Normal file
69
c/src/lib/libbsp/arm/raspberrypi/include/rpi-gpio.h
Normal file
@@ -0,0 +1,69 @@
|
||||
/**
|
||||
* @file rpi-gpio.h
|
||||
*
|
||||
* @ingroup raspberrypi_gpio
|
||||
*
|
||||
* @brief Raspberry Pi specific GPIO definitions.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2015 Andre Marques <andre.lousa.marques at gmail.com>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_ARM_RASPBERRYPI_RPI_GPIO_H
|
||||
#define LIBBSP_ARM_RASPBERRYPI_RPI_GPIO_H
|
||||
|
||||
#include <rtems.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/**
|
||||
* @brief Raspberry Pi GPIO functions.
|
||||
*/
|
||||
#define RPI_DIGITAL_IN 7
|
||||
#define RPI_DIGITAL_OUT 1
|
||||
#define RPI_ALT_FUNC_0 4
|
||||
#define RPI_ALT_FUNC_1 5
|
||||
#define RPI_ALT_FUNC_2 6
|
||||
#define RPI_ALT_FUNC_3 7
|
||||
#define RPI_ALT_FUNC_4 3
|
||||
#define RPI_ALT_FUNC_5 2
|
||||
|
||||
/**
|
||||
* @brief Setups a JTAG interface.
|
||||
*
|
||||
* @retval RTEMS_SUCCESSFUL JTAG interface successfully configured.
|
||||
* @retval * At least one of the required pins is currently
|
||||
* occupied, @see rtems_gpio_request_pin_group().
|
||||
*/
|
||||
extern rtems_status_code rpi_gpio_select_jtag(void);
|
||||
|
||||
/**
|
||||
* @brief Setups a SPI interface.
|
||||
*
|
||||
* @retval RTEMS_SUCCESSFUL SPI interface successfully configured.
|
||||
* @retval * At least one of the required pins is currently
|
||||
* occupied, @see rtems_gpio_request_pin_group().
|
||||
*/
|
||||
extern rtems_status_code rpi_gpio_select_spi(void);
|
||||
|
||||
/**
|
||||
* @brief Setups a I2C interface.
|
||||
*
|
||||
* @retval RTEMS_SUCCESSFUL I2C interface successfully configured.
|
||||
* @retval * At least one of the required pins is currently
|
||||
* occupied, @see rtems_gpio_request_pin_group().
|
||||
*/
|
||||
extern rtems_status_code rpi_gpio_select_i2c(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* LIBBSP_ARM_RASPBERRYPI_RPI_GPIO_H */
|
||||
@@ -1,5 +1,5 @@
|
||||
/**
|
||||
* @file
|
||||
* @file irq.c
|
||||
*
|
||||
* @ingroup raspberrypi_interrupt
|
||||
*
|
||||
@@ -7,6 +7,8 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2014 Andre Marques <andre.lousa.marques at gmail.com>
|
||||
*
|
||||
* Copyright (c) 2009
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
@@ -52,22 +54,47 @@ void bsp_interrupt_dispatch(void)
|
||||
rtems_vector_number vector = 255;
|
||||
|
||||
/* ARM timer */
|
||||
if (BCM2835_REG(BCM2835_IRQ_BASIC) && 0x1)
|
||||
if ( BCM2835_REG(BCM2835_IRQ_BASIC) & 0x1 )
|
||||
{
|
||||
vector = BCM2835_IRQ_ID_TIMER_0;
|
||||
|
||||
}
|
||||
/* UART 0 */
|
||||
else if ( BCM2835_REG(BCM2835_IRQ_BASIC) && BCM2835_BIT(19))
|
||||
else if ( BCM2835_REG(BCM2835_IRQ_BASIC) & BCM2835_BIT(19) )
|
||||
{
|
||||
vector = BCM2835_IRQ_ID_UART;
|
||||
}
|
||||
/* GPIO 0*/
|
||||
else if ( BCM2835_REG(BCM2835_IRQ_PENDING2) & BCM2835_BIT(17) )
|
||||
{
|
||||
vector = BCM2835_IRQ_ID_GPIO_0;
|
||||
}
|
||||
else if ( BCM2835_REG(BCM2835_IRQ_PENDING2) & BCM2835_BIT(18) )
|
||||
{
|
||||
vector = BCM2835_IRQ_ID_GPIO_1;
|
||||
}
|
||||
else if ( BCM2835_REG(BCM2835_IRQ_PENDING2) & BCM2835_BIT(19) )
|
||||
{
|
||||
vector = BCM2835_IRQ_ID_GPIO_2;
|
||||
}
|
||||
else if ( BCM2835_REG(BCM2835_IRQ_PENDING2) & BCM2835_BIT(20) )
|
||||
{
|
||||
vector = BCM2835_IRQ_ID_GPIO_3;
|
||||
}
|
||||
/* I2C */
|
||||
else if ( BCM2835_REG(BCM2835_IRQ_PENDING2) & BCM2835_BIT(21) )
|
||||
{
|
||||
vector = BCM2835_IRQ_ID_I2C;
|
||||
}
|
||||
/* SPI */
|
||||
else if ( BCM2835_REG(BCM2835_IRQ_PENDING2) & BCM2835_BIT(22) )
|
||||
{
|
||||
vector = BCM2835_IRQ_ID_SPI;
|
||||
}
|
||||
|
||||
if ( vector < 255 )
|
||||
{
|
||||
bsp_interrupt_handler_dispatch(vector);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
|
||||
@@ -75,8 +102,8 @@ rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
|
||||
rtems_interrupt_level level;
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
|
||||
/* ARM Timer */
|
||||
|
||||
/* ARM Timer */
|
||||
if ( vector == BCM2835_IRQ_ID_TIMER_0 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_ENABLE_BASIC) = 0x1;
|
||||
@@ -85,8 +112,38 @@ rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
|
||||
else if ( vector == BCM2835_IRQ_ID_UART )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(25);
|
||||
|
||||
}
|
||||
/* GPIO 0 */
|
||||
else if ( vector == BCM2835_IRQ_ID_GPIO_0 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(17);
|
||||
}
|
||||
/* GPIO 1 */
|
||||
else if ( vector == BCM2835_IRQ_ID_GPIO_1 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(18);
|
||||
}
|
||||
/* GPIO 2 */
|
||||
else if ( vector == BCM2835_IRQ_ID_GPIO_2 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(19);
|
||||
}
|
||||
/* GPIO 3 */
|
||||
else if ( vector == BCM2835_IRQ_ID_GPIO_3 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(20);
|
||||
}
|
||||
/* I2C */
|
||||
else if ( vector == BCM2835_IRQ_ID_I2C )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(21);
|
||||
}
|
||||
/* SPI */
|
||||
else if ( vector == BCM2835_IRQ_ID_SPI )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(22);
|
||||
}
|
||||
|
||||
rtems_interrupt_enable(level);
|
||||
|
||||
return RTEMS_SUCCESSFUL;
|
||||
@@ -106,12 +163,42 @@ rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(25);
|
||||
}
|
||||
/* GPIO 0 */
|
||||
else if ( vector == BCM2835_IRQ_ID_GPIO_0 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(17);
|
||||
}
|
||||
/* GPIO 1 */
|
||||
else if ( vector == BCM2835_IRQ_ID_GPIO_1 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(18);
|
||||
}
|
||||
/* GPIO 2 */
|
||||
else if ( vector == BCM2835_IRQ_ID_GPIO_2 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(19);
|
||||
}
|
||||
/* GPIO 3 */
|
||||
else if ( vector == BCM2835_IRQ_ID_GPIO_3 )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(20);
|
||||
}
|
||||
/* I2C */
|
||||
else if ( vector == BCM2835_IRQ_ID_I2C )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(21);
|
||||
}
|
||||
/* SPI */
|
||||
else if ( vector == BCM2835_IRQ_ID_SPI )
|
||||
{
|
||||
BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(22);
|
||||
}
|
||||
|
||||
rtems_interrupt_enable(level);
|
||||
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
|
||||
void bsp_interrupt_handler_default(rtems_vector_number vector)
|
||||
{
|
||||
printk("spurious interrupt: %u\n", vector);
|
||||
|
||||
@@ -130,6 +130,10 @@ $(PROJECT_INCLUDE)/bsp/raspberrypi.h: include/raspberrypi.h $(PROJECT_INCLUDE)/b
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/raspberrypi.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/raspberrypi.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/rpi-gpio.h: include/rpi-gpio.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/rpi-gpio.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/rpi-gpio.h
|
||||
|
||||
$(PROJECT_INCLUDE)/libcpu/cache_.h: ../../../libcpu/arm/shared/include/cache_.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/cache_.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/cache_.h
|
||||
|
||||
Reference in New Issue
Block a user