Add files necessary to create a Pearl Gecko build configuration in the new EFM32 SimplicityStudio project.

This commit is contained in:
Richard Barry
2016-02-20 15:27:40 +00:00
parent f4033581b5
commit 780aa7e325
230 changed files with 41687 additions and 4667 deletions

View File

@@ -104,7 +104,7 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="Source/FreeRTOS_Source/portable/GCC/ARM_CM4F|Source/SilLabs_Code/kits/EFM32WG_STK3800|Source/SilLabs_Code/Device/SiliconLabs/EFM32GG/Source|Source/SilLabs_Code/Device/SiliconLabs/EFM32WG|Source/SilLabs_Code/CMSIS/efm32wg|CMSIS/efm32wg|Source/SilLabs_Code/kits/bsp/bsp_dk_3201.c|Source/SilLabs_Code/kits/bsp/bsp_dk_3200.c|Source/SilLabs_Code/kits/bsp/bsp_dk_leds.c|Source/RTT|Source/SilLabs_Code/kits/bsp/bsp_dk_mcuboard.c|Source/SilLabs_Code/kits/bsp/bsp_bcc.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
<entry excluding="Source/SilLabs_Code/CMSIS/efm32pg1b|Source/SilLabs_Code/Device/SiliconLabs/EFM32PG1B|Source/SilLabs_Code/kits/SLSTK3401A_EFM32PG|Source/FreeRTOS_Source/portable/GCC/ARM_CM4F|Source/SilLabs_Code/kits/EFM32WG_STK3800|Source/SilLabs_Code/Device/SiliconLabs/EFM32GG/Source|Source/SilLabs_Code/Device/SiliconLabs/EFM32WG|Source/SilLabs_Code/CMSIS/efm32wg|CMSIS/efm32wg|Source/SilLabs_Code/kits/bsp/bsp_dk_3201.c|Source/SilLabs_Code/kits/bsp/bsp_dk_3200.c|Source/SilLabs_Code/kits/bsp/bsp_dk_leds.c|Source/RTT|Source/SilLabs_Code/kits/bsp/bsp_dk_mcuboard.c|Source/SilLabs_Code/kits/bsp/bsp_bcc.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>
</configuration>
</storageModule>
@@ -212,8 +212,19 @@
<tool id="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.archiver.base.310362498" name="GNU ARM Archiver" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.archiver.base"/>
</toolChain>
</folderInfo>
<folderInfo id="com.silabs.ide.si32.gcc.debug#com.silabs.ide.si32.gcc:4.8.3.20131129@5.1008127701" name="/" resourcePath="Source/SilLabs_Code/kits/SLSTK3401A_EFM32PG">
<toolChain id="com.silabs.ide.si32.gcc.cdt.managedbuild.toolchain.exe.2026080801" name="Si32 GNU ARM" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.toolchain.exe" unusedChildren="">
<option id="com.silabs.ide.si32.gcc.cdt.managedbuild.toolchain.debug.level.860218153.408368925" name="Debug Level" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.toolchain.debug.level.860218153"/>
<tool id="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.c.compiler.base.276729238" name="GNU ARM C Compiler" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.c.compiler.base.637949526"/>
<tool id="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.cpp.compiler.base.289631977" name="GNU ARM C++ Compiler" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.cpp.compiler.base.607108724"/>
<tool id="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.assembler.base.1946889243" name="GNU ARM Assembler" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.assembler.base.599397077"/>
<tool id="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.c.linker.base.364942885" name="GNU ARM C Linker" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.c.linker.base.1895173662"/>
<tool id="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.cpp.linker.base.915572947" name="GNU ARM C++ Linker" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.cpp.linker.base.1027397459"/>
<tool id="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.archiver.base.1439736431" name="GNU ARM Archiver" superClass="com.silabs.ide.si32.gcc.cdt.managedbuild.tool.gnu.archiver.base.310362498"/>
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="Source/FreeRTOS_Source/portable/GCC/ARM_CM3|Source/SilLabs_Code/Device/SiliconLabs/EFM32WG/Source|Source/SilLabs_Code/kits/EFM32GG_STK3700|Source/SilLabs_Code/Device/SiliconLabs/EFM32GG|Source/SilLabs_Code/CMSIS/efm32gg|CMSIS/efm32gg" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
<entry excluding="Source/SilLabs_Code/kits/SLSTK3401A_EFM32PG|Source/SilLabs_Code/Device/SiliconLabs/EFM32PG1B|Source/SilLabs_Code/CMSIS/efm32pg1b|Source/FreeRTOS_Source/portable/GCC/ARM_CM3|Source/SilLabs_Code/Device/SiliconLabs/EFM32WG/Source|Source/SilLabs_Code/kits/EFM32GG_STK3700|Source/SilLabs_Code/Device/SiliconLabs/EFM32GG|Source/SilLabs_Code/CMSIS/efm32gg|CMSIS/efm32gg" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>
</configuration>
</storageModule>

View File

@@ -81,6 +81,7 @@
#include "em_burtc.h"
#include "em_rmu.h"
#include "em_int.h"
#include "em_rtc.h"
#include "sleep.h"
/* SEE THE COMMENTS ABOVE THE DEFINITION OF configCREATE_LOW_POWER_DEMO IN

View File

@@ -0,0 +1,317 @@
/* @file startup_efm32pg1b.S
* @brief startup file for Silicon Labs EFM32PG1B devices.
* For use with GCC for ARM Embedded Processors
* @version 4.2.1
* Date: 12 June 2014
*
*/
/* Copyright (c) 2011 - 2014 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
.syntax unified
.arch armv7-m
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0x00000400
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0x00000C00
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .vectors
.align 2
.globl __Vectors
__Vectors:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long MemManage_Handler /* MPU Fault Handler */
.long BusFault_Handler /* Bus Fault Handler */
.long UsageFault_Handler /* Usage Fault Handler */
.long Default_Handler /* Reserved */
.long Default_Handler /* Reserved */
.long Default_Handler /* Reserved */
.long Default_Handler /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long DebugMon_Handler /* Debug Monitor Handler */
.long Default_Handler /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External interrupts */
.long EMU_IRQHandler /* 0 - EMU */
.long Default_Handler /* 1 - Reserved */
.long WDOG0_IRQHandler /* 2 - WDOG0 */
.long Default_Handler /* 3 - Reserved */
.long Default_Handler /* 4 - Reserved */
.long Default_Handler /* 5 - Reserved */
.long Default_Handler /* 6 - Reserved */
.long Default_Handler /* 7 - Reserved */
.long LDMA_IRQHandler /* 8 - LDMA */
.long GPIO_EVEN_IRQHandler /* 9 - GPIO_EVEN */
.long TIMER0_IRQHandler /* 10 - TIMER0 */
.long USART0_RX_IRQHandler /* 11 - USART0_RX */
.long USART0_TX_IRQHandler /* 12 - USART0_TX */
.long ACMP0_IRQHandler /* 13 - ACMP0 */
.long ADC0_IRQHandler /* 14 - ADC0 */
.long IDAC0_IRQHandler /* 15 - IDAC0 */
.long I2C0_IRQHandler /* 16 - I2C0 */
.long GPIO_ODD_IRQHandler /* 17 - GPIO_ODD */
.long TIMER1_IRQHandler /* 18 - TIMER1 */
.long USART1_RX_IRQHandler /* 19 - USART1_RX */
.long USART1_TX_IRQHandler /* 20 - USART1_TX */
.long LEUART0_IRQHandler /* 21 - LEUART0 */
.long PCNT0_IRQHandler /* 22 - PCNT0 */
.long CMU_IRQHandler /* 23 - CMU */
.long MSC_IRQHandler /* 24 - MSC */
.long CRYPTO_IRQHandler /* 25 - CRYPTO */
.long LETIMER0_IRQHandler /* 26 - LETIMER0 */
.long Default_Handler /* 27 - Reserved */
.long Default_Handler /* 28 - Reserved */
.long RTCC_IRQHandler /* 29 - RTCC */
.long Default_Handler /* 30 - Reserved */
.long CRYOTIMER_IRQHandler /* 31 - CRYOTIMER */
.long Default_Handler /* 32 - Reserved */
.long FPUEH_IRQHandler /* 33 - FPUEH */
.size __Vectors, . - __Vectors
.text
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
#ifndef __NO_SYSTEM_INIT
ldr r0, =SystemInit
blx r0
#endif
/* Firstly it copies data from read only memory to RAM. There are two schemes
* to copy. One can copy more than one sections. Another can only copy
* one section. The former scheme needs more instructions and read-only
* data to implement than the latter.
* Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
#ifdef __STARTUP_COPY_MULTIPLE
/* Multiple sections scheme.
*
* Between symbol address __copy_table_start__ and __copy_table_end__,
* there are array of triplets, each of which specify:
* offset 0: LMA of start of a section to copy from
* offset 4: VMA of start of a section to copy to
* offset 8: size of the section to copy. Must be multiply of 4
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r4, =__copy_table_start__
ldr r5, =__copy_table_end__
.L_loop0:
cmp r4, r5
bge .L_loop0_done
ldr r1, [r4]
ldr r2, [r4, #4]
ldr r3, [r4, #8]
.L_loop0_0:
subs r3, #4
ittt ge
ldrge r0, [r1, r3]
strge r0, [r2, r3]
bge .L_loop0_0
adds r4, #12
b .L_loop0
.L_loop0_done:
#else
/* Single section scheme.
*
* The ranges of copy from/to are specified by following symbols
* __etext: LMA of start of the section to copy from. Usually end of text
* __data_start__: VMA of start of the section to copy to
* __data_end__: VMA of end of the section to copy to
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
.L_loop1:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .L_loop1
#endif /*__STARTUP_COPY_MULTIPLE */
/* This part of work usually is done in C library startup code. Otherwise,
* define this macro to enable it in this startup.
*
* There are two schemes too. One can clear multiple BSS sections. Another
* can only clear one section. The former is more size expensive than the
* latter.
*
* Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
* Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
*/
#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
/* Multiple sections scheme.
*
* Between symbol address __copy_table_start__ and __copy_table_end__,
* there are array of tuples specifying:
* offset 0: Start of a BSS section
* offset 4: Size of this BSS section. Must be multiply of 4
*/
ldr r3, =__zero_table_start__
ldr r4, =__zero_table_end__
.L_loop2:
cmp r3, r4
bge .L_loop2_done
ldr r1, [r3]
ldr r2, [r3, #4]
movs r0, 0
.L_loop2_0:
subs r2, #4
itt ge
strge r0, [r1, r2]
bge .L_loop2_0
adds r3, #8
b .L_loop2
.L_loop2_done:
#elif defined (__STARTUP_CLEAR_BSS)
/* Single BSS section scheme.
*
* The BSS section is specified by following symbols
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* Both addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__bss_start__
ldr r2, =__bss_end__
movs r0, 0
.L_loop3:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .L_loop3
#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
#ifndef __START
#define __START _start
#endif
bl __START
.pool
.size Reset_Handler, . - Reset_Handler
.align 1
.thumb_func
.weak Default_Handler
.type Default_Handler, %function
Default_Handler:
b .
.size Default_Handler, . - Default_Handler
/* Macro to define default handlers. Default handler
* will be weak symbol and just dead loops. They can be
* overwritten by other handlers */
.macro def_irq_handler handler_name
.weak \handler_name
.set \handler_name, Default_Handler
.endm
def_irq_handler NMI_Handler
def_irq_handler HardFault_Handler
def_irq_handler MemManage_Handler
def_irq_handler BusFault_Handler
def_irq_handler UsageFault_Handler
def_irq_handler SVC_Handler
def_irq_handler DebugMon_Handler
def_irq_handler PendSV_Handler
def_irq_handler SysTick_Handler
def_irq_handler EMU_IRQHandler
def_irq_handler WDOG0_IRQHandler
def_irq_handler LDMA_IRQHandler
def_irq_handler GPIO_EVEN_IRQHandler
def_irq_handler TIMER0_IRQHandler
def_irq_handler USART0_RX_IRQHandler
def_irq_handler USART0_TX_IRQHandler
def_irq_handler ACMP0_IRQHandler
def_irq_handler ADC0_IRQHandler
def_irq_handler IDAC0_IRQHandler
def_irq_handler I2C0_IRQHandler
def_irq_handler GPIO_ODD_IRQHandler
def_irq_handler TIMER1_IRQHandler
def_irq_handler USART1_RX_IRQHandler
def_irq_handler USART1_TX_IRQHandler
def_irq_handler LEUART0_IRQHandler
def_irq_handler PCNT0_IRQHandler
def_irq_handler CMU_IRQHandler
def_irq_handler MSC_IRQHandler
def_irq_handler CRYPTO_IRQHandler
def_irq_handler LETIMER0_IRQHandler
def_irq_handler RTCC_IRQHandler
def_irq_handler CRYOTIMER_IRQHandler
def_irq_handler FPUEH_IRQHandler
.end

View File

@@ -0,0 +1,383 @@
/***************************************************************************//**
* @file system_efm32pg1b.c
* @brief CMSIS Cortex-M3/M4 System Layer for EFM32 devices.
* @version 4.2.1
******************************************************************************
* @section License
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
* including commercial applications, and to alter it and redistribute it
* freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software.@n
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.@n
* 3. This notice may not be removed or altered from any source distribution.
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
* has no obligation to support this Software. Silicon Laboratories, Inc. is
* providing the Software "AS IS", with no express or implied warranties of any
* kind, including, but not limited to, any implied warranties of
* merchantability or fitness for any particular purpose or warranties against
* infringement of any proprietary rights of a third party.
*
* Silicon Laboratories, Inc. will not be liable for any consequential,
* incidental, or special damages, or any other relief, or for any claim by
* any third party, arising from your use of this Software.
*
*****************************************************************************/
#include <stdint.h>
#include "em_device.h"
/*******************************************************************************
****************************** DEFINES ************************************
******************************************************************************/
/** LFRCO frequency, tuned to below frequency during manufacturing. */
#define EFM32_LFRCO_FREQ (32768UL)
#define EFM32_ULFRCO_FREQ (1000UL)
/*******************************************************************************
************************** LOCAL VARIABLES ********************************
******************************************************************************/
/* System oscillator frequencies. These frequencies are normally constant */
/* for a target, but they are made configurable in order to allow run-time */
/* handling of different boards. The crystal oscillator clocks can be set */
/* compile time to a non-default value by defining respective EFM_nFXO_FREQ */
/* values according to board design. By defining the EFM_nFXO_FREQ to 0, */
/* one indicates that the oscillator is not present, in order to save some */
/* SW footprint. */
#ifndef EFM32_HFRCO_MAX_FREQ
#define EFM32_HFRCO_MAX_FREQ (38000000UL)
#endif
#ifndef EFM32_HFXO_FREQ
#define EFM32_HFXO_FREQ (40000000UL)
#endif
#ifndef EFM32_HFRCO_STARTUP_FREQ
#define EFM32_HFRCO_STARTUP_FREQ (19000000UL)
#endif
/* Do not define variable if HF crystal oscillator not present */
#if (EFM32_HFXO_FREQ > 0UL)
/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
/** System HFXO clock. */
static uint32_t SystemHFXOClock = EFM32_HFXO_FREQ;
/** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
#endif
#ifndef EFM32_LFXO_FREQ
#define EFM32_LFXO_FREQ (EFM32_LFRCO_FREQ)
#endif
/* Do not define variable if LF crystal oscillator not present */
#if (EFM32_LFXO_FREQ > 0UL)
/** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
/** System LFXO clock. */
static uint32_t SystemLFXOClock = 32768UL;
/** @endcond (DO_NOT_INCLUDE_WITH_DOXYGEN) */
#endif
/*******************************************************************************
************************** GLOBAL VARIABLES *******************************
******************************************************************************/
/**
* @brief
* System System Clock Frequency (Core Clock).
*
* @details
* Required CMSIS global variable that must be kept up-to-date.
*/
uint32_t SystemCoreClock;
/**
* @brief
* System HFRCO frequency
*
* @note
* This is an EFM32 proprietary variable, not part of the CMSIS definition.
*
* @details
* Frequency of the system HFRCO oscillator
*/
uint32_t SystemHfrcoFreq = EFM32_HFRCO_STARTUP_FREQ;
/*******************************************************************************
************************** GLOBAL FUNCTIONS *******************************
******************************************************************************/
/***************************************************************************//**
* @brief
* Get the current core clock frequency.
*
* @details
* Calculate and get the current core clock frequency based on the current
* configuration. Assuming that the SystemCoreClock global variable is
* maintained, the core clock frequency is stored in that variable as well.
* This function will however calculate the core clock based on actual HW
* configuration. It will also update the SystemCoreClock global variable.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @return
* The current core clock frequency in Hz.
******************************************************************************/
uint32_t SystemCoreClockGet(void)
{
uint32_t ret;
uint32_t presc;
ret = SystemHFClockGet();
presc = (CMU->HFCOREPRESC & _CMU_HFCOREPRESC_PRESC_MASK) >>
_CMU_HFCOREPRESC_PRESC_SHIFT;
ret /= (presc + 1);
/* Keep CMSIS system clock variable up-to-date */
SystemCoreClock = ret;
return ret;
}
/***************************************************************************//**
* @brief
* Get the maximum core clock frequency.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @return
* The maximum core clock frequency in Hz.
******************************************************************************/
uint32_t SystemMaxCoreClockGet(void)
{
return (EFM32_HFRCO_MAX_FREQ > EFM32_HFXO_FREQ ? \
EFM32_HFRCO_MAX_FREQ : EFM32_HFXO_FREQ);
}
/***************************************************************************//**
* @brief
* Get the current HFCLK frequency.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @return
* The current HFCLK frequency in Hz.
******************************************************************************/
uint32_t SystemHFClockGet(void)
{
uint32_t ret;
switch (CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK)
{
case CMU_HFCLKSTATUS_SELECTED_LFXO:
#if (EFM32_LFXO_FREQ > 0)
ret = SystemLFXOClock;
#else
/* We should not get here, since core should not be clocked. May */
/* be caused by a misconfiguration though. */
ret = 0;
#endif
break;
case CMU_HFCLKSTATUS_SELECTED_LFRCO:
ret = EFM32_LFRCO_FREQ;
break;
case CMU_HFCLKSTATUS_SELECTED_HFXO:
#if (EFM32_HFXO_FREQ > 0)
ret = SystemHFXOClock;
#else
/* We should not get here, since core should not be clocked. May */
/* be caused by a misconfiguration though. */
ret = 0;
#endif
break;
default: /* CMU_HFCLKSTATUS_SELECTED_HFRCO */
ret = SystemHfrcoFreq;
break;
}
return ret;
}
/**************************************************************************//**
* @brief
* Get high frequency crystal oscillator clock frequency for target system.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @return
* HFXO frequency in Hz.
*****************************************************************************/
uint32_t SystemHFXOClockGet(void)
{
/* External crystal oscillator present? */
#if (EFM32_HFXO_FREQ > 0)
return SystemHFXOClock;
#else
return 0;
#endif
}
/**************************************************************************//**
* @brief
* Set high frequency crystal oscillator clock frequency for target system.
*
* @note
* This function is mainly provided for being able to handle target systems
* with different HF crystal oscillator frequencies run-time. If used, it
* should probably only be used once during system startup.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @param[in] freq
* HFXO frequency in Hz used for target.
*****************************************************************************/
void SystemHFXOClockSet(uint32_t freq)
{
/* External crystal oscillator present? */
#if (EFM32_HFXO_FREQ > 0)
SystemHFXOClock = freq;
/* Update core clock frequency if HFXO is used to clock core */
if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) == CMU_HFCLKSTATUS_SELECTED_HFXO)
{
/* The function will update the global variable */
SystemCoreClockGet();
}
#else
(void)freq; /* Unused parameter */
#endif
}
/**************************************************************************//**
* @brief
* Initialize the system.
*
* @details
* Do required generic HW system init.
*
* @note
* This function is invoked during system init, before the main() routine
* and any data has been initialized. For this reason, it cannot do any
* initialization of variables etc.
*****************************************************************************/
void SystemInit(void)
{
#if (__FPU_PRESENT == 1)
/* Set floating point coprosessor access mode. */
SCB->CPACR |= ((3UL << 10 * 2) | /* set CP10 Full Access */
(3UL << 11 * 2)); /* set CP11 Full Access */
#endif
}
/**************************************************************************//**
* @brief
* Get low frequency RC oscillator clock frequency for target system.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @return
* LFRCO frequency in Hz.
*****************************************************************************/
uint32_t SystemLFRCOClockGet(void)
{
/* Currently we assume that this frequency is properly tuned during */
/* manufacturing and is not changed after reset. If future requirements */
/* for re-tuning by user, we can add support for that. */
return EFM32_LFRCO_FREQ;
}
/**************************************************************************//**
* @brief
* Get ultra low frequency RC oscillator clock frequency for target system.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @return
* ULFRCO frequency in Hz.
*****************************************************************************/
uint32_t SystemULFRCOClockGet(void)
{
/* The ULFRCO frequency is not tuned, and can be very inaccurate */
return EFM32_ULFRCO_FREQ;
}
/**************************************************************************//**
* @brief
* Get low frequency crystal oscillator clock frequency for target system.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @return
* LFXO frequency in Hz.
*****************************************************************************/
uint32_t SystemLFXOClockGet(void)
{
/* External crystal oscillator present? */
#if (EFM32_LFXO_FREQ > 0)
return SystemLFXOClock;
#else
return 0;
#endif
}
/**************************************************************************//**
* @brief
* Set low frequency crystal oscillator clock frequency for target system.
*
* @note
* This function is mainly provided for being able to handle target systems
* with different HF crystal oscillator frequencies run-time. If used, it
* should probably only be used once during system startup.
*
* @note
* This is an EFM32 proprietary function, not part of the CMSIS definition.
*
* @param[in] freq
* LFXO frequency in Hz used for target.
*****************************************************************************/
void SystemLFXOClockSet(uint32_t freq)
{
/* External crystal oscillator present? */
#if (EFM32_LFXO_FREQ > 0)
SystemLFXOClock = freq;
/* Update core clock frequency if LFXO is used to clock core */
if ((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) == CMU_HFCLKSTATUS_SELECTED_LFXO)
{
/* The function will update the global variable */
SystemCoreClockGet();
}
#else
(void)freq; /* Unused parameter */
#endif
}

View File

@@ -1,4 +1,19 @@
================ Revision history ============================================
4.2.1:
- No changes.
4.2.0:
- Various corrections and improvements of Jade/Pearl/EFR family files.
4.1.1:
- Added CRYPTO module (cryptographic engine) to Jade/Pearl/EFR families.
4.1.0:
- Added device headers for new families EZR32HG (EZR Happy Gecko), EFM32JG
(Jade Gecko) and EFM32PG (Pearl Gecko)
- Bugfixes in EZR32 LG and WG system/startup files.
- Added support for new EZR32HG family.
4.0.0:
- Use ARM CMSIS version 4.2.0.
- emlib: New style version macros in em_version.h.

View File

@@ -2,10 +2,10 @@
* @file efm32gg990f1024.h
* @brief CMSIS Cortex-M Peripheral Access Layer Header File
* for EFM32GG990F1024
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -31,8 +31,8 @@
*
*****************************************************************************/
#ifndef __SILICON_LABS_EFM32GG990F1024_H__
#define __SILICON_LABS_EFM32GG990F1024_H__
#ifndef EFM32GG990F1024_H
#define EFM32GG990F1024_H
#ifdef __cplusplus
extern "C" {
@@ -476,4 +476,4 @@ typedef enum IRQn
#ifdef __cplusplus
}
#endif
#endif /* __SILICON_LABS_EFM32GG990F1024_H__ */
#endif /* EFM32GG990F1024_H */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_acmp.h
* @brief EFM32GG_ACMP register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_ACMP
* @{
@@ -327,5 +331,5 @@ typedef struct
#define ACMP_ROUTE_LOCATION_LOC2 (_ACMP_ROUTE_LOCATION_LOC2 << 8) /**< Shifted mode LOC2 for ACMP_ROUTE */
/** @} End of group EFM32GG_ACMP */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_adc.h
* @brief EFM32GG_ADC register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_ADC
* @{
@@ -666,5 +670,5 @@ typedef struct
#define ADC_BIASPROG_COMPBIAS_DEFAULT (_ADC_BIASPROG_COMPBIAS_DEFAULT << 8) /**< Shifted mode DEFAULT for ADC_BIASPROG */
/** @} End of group EFM32GG_ADC */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_aes.h
* @brief EFM32GG_AES register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_AES
* @{
@@ -235,5 +239,5 @@ typedef struct
#define AES_KEYHD_KEYHD_DEFAULT (_AES_KEYHD_KEYHD_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_KEYHD */
/** @} End of group EFM32GG_AES */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_af_pins.h
* @brief EFM32GG_AF_PINS register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_AF_Pins
* @{
@@ -200,5 +204,5 @@
#define AF_ETM_TD3_PIN(i) ((i) == 0 ? 5 : (i) == 1 ? 3 : (i) == 2 ? 5 : (i) == 3 ? 5 : -1)
/** @} End of group EFM32GG_AF_Pins */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_af_ports.h
* @brief EFM32GG_AF_PORTS register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_AF_Ports
* @{
@@ -200,5 +204,5 @@
#define AF_ETM_TD3_PORT(i) ((i) == 0 ? 3 : (i) == 1 ? 5 : (i) == 2 ? 3 : (i) == 3 ? 0 : -1)
/** @} End of group EFM32GG_AF_Ports */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_burtc.h
* @brief EFM32GG_BURTC register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_BURTC
* @{
@@ -372,5 +376,5 @@ typedef struct
#define BURTC_RET_REG_REG_DEFAULT (_BURTC_RET_REG_REG_DEFAULT << 0) /**< Shifted mode DEFAULT for BURTC_RET_REG */
/** @} End of group EFM32GG_BURTC */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_burtc_ret.h
* @brief EFM32GG_BURTC_RET register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief BURTC_RET EFM32GG BURTC RET
*****************************************************************************/
@@ -37,3 +41,6 @@ typedef struct
__IO uint32_t REG; /**< Retention Register */
} BURTC_RET_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_calibrate.h
* @brief EFM32GG_CALIBRATE register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_CALIBRATE
* @{
@@ -41,3 +45,6 @@ typedef struct
__I uint32_t VALUE; /**< Default value for calibration register */
} CALIBRATE_TypeDef; /** @} */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_cmu.h
* @brief EFM32GG_CMU register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_CMU
* @{
@@ -1244,5 +1248,5 @@ typedef struct
#define CMU_LOCK_LOCKKEY_UNLOCK (_CMU_LOCK_LOCKKEY_UNLOCK << 0) /**< Shifted mode UNLOCK for CMU_LOCK */
/** @} End of group EFM32GG_CMU */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_dac.h
* @brief EFM32GG_DAC register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_DAC
* @{
@@ -788,5 +792,5 @@ typedef struct
#define DAC_OPA2MUX_RESSEL_RES7 (_DAC_OPA2MUX_RESSEL_RES7 << 28) /**< Shifted mode RES7 for DAC_OPA2MUX */
/** @} End of group EFM32GG_DAC */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_devinfo.h
* @brief EFM32GG_DEVINFO register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_DEVINFO
* @{
@@ -163,5 +167,5 @@ typedef struct
#define _DEVINFO_PART_DEVICE_NUMBER_SHIFT 0 /**< Bit position for device number */
/** @} End of group EFM32GG_DEVINFO */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_dma.h
* @brief EFM32GG_DMA register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_DMA
* @{
@@ -1624,5 +1628,5 @@ typedef struct
#define DMA_CH_CTRL_SOURCESEL_EBI (_DMA_CH_CTRL_SOURCESEL_EBI << 16) /**< Shifted mode EBI for DMA_CH_CTRL */
/** @} End of group EFM32GG_DMA */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_dma_ch.h
* @brief EFM32GG_DMA_CH register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief DMA_CH EFM32GG DMA CH
*****************************************************************************/
@@ -37,3 +41,6 @@ typedef struct
__IO uint32_t CTRL; /**< Channel Control Register */
} DMA_CH_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_dma_descriptor.h
* @brief EFM32GG_DMA_DESCRIPTOR register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_DMA_DESCRIPTOR
* @{
@@ -43,3 +47,6 @@ typedef struct
__IO uint32_t USER; /**< DMA padding register, available for user */
} DMA_DESCRIPTOR_TypeDef; /** @} */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_dmactrl.h
* @brief EFM32GG_DMACTRL register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_DMACTRL_BitFields
@@ -132,5 +136,5 @@
#define DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT 0x000000007UL /**< Peripheral scatter gather cycle type using alternate structure */
/** @} End of group EFM32GG_DMA */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_dmareq.h
* @brief EFM32GG_DMAREQ register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_DMAREQ_BitFields
@@ -95,5 +99,5 @@
#define DMAREQ_EBI_DDEMPTY ((51 << 16) + 3) /**< DMA channel select for EBI_DDEMPTY */
/** @} End of group EFM32GG_DMAREQ */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_ebi.h
* @brief EFM32GG_EBI register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_EBI
* @{
@@ -1456,5 +1460,5 @@ typedef struct
#define EBI_IEN_DDJIT_DEFAULT (_EBI_IEN_DDJIT_DEFAULT << 5) /**< Shifted mode DEFAULT for EBI_IEN */
/** @} End of group EFM32GG_EBI */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_emu.h
* @brief EFM32GG_EMU register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_EMU
* @{
@@ -353,5 +357,5 @@ typedef struct
#define EMU_BUBODUNREGCAL_RANGE_DEFAULT (_EMU_BUBODUNREGCAL_RANGE_DEFAULT << 3) /**< Shifted mode DEFAULT for EMU_BUBODUNREGCAL */
/** @} End of group EFM32GG_EMU */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_etm.h
* @brief EFM32GG_ETM register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_ETM
* @{
@@ -778,5 +782,5 @@ typedef struct
#define ETM_ETMCIDR3_PREAMB_DEFAULT (_ETM_ETMCIDR3_PREAMB_DEFAULT << 0) /**< Shifted mode DEFAULT for ETM_ETMCIDR3 */
/** @} End of group EFM32GG_ETM */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_gpio.h
* @brief EFM32GG_GPIO register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_GPIO
* @{
@@ -1200,5 +1204,5 @@ typedef struct
#define GPIO_EM4WUCAUSE_EM4WUCAUSE_E13 (_GPIO_EM4WUCAUSE_EM4WUCAUSE_E13 << 0) /**< Shifted mode E13 for GPIO_EM4WUCAUSE */
/** @} End of group EFM32GG_GPIO */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_gpio_p.h
* @brief EFM32GG_GPIO_P register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief GPIO_P EFM32GG GPIO P
*****************************************************************************/
@@ -45,3 +49,6 @@ typedef struct
__IO uint32_t PINLOCKN; /**< Port Unlocked Pins Register */
} GPIO_P_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_i2c.h
* @brief EFM32GG_I2C register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_I2C
* @{
@@ -697,5 +701,5 @@ typedef struct
#define I2C_ROUTE_LOCATION_LOC6 (_I2C_ROUTE_LOCATION_LOC6 << 8) /**< Shifted mode LOC6 for I2C_ROUTE */
/** @} End of group EFM32GG_I2C */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_lcd.h
* @brief EFM32GG_LCD register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_LCD
* @{
@@ -591,5 +595,5 @@ typedef struct
#define LCD_SEGD7L_SEGD7L_DEFAULT (_LCD_SEGD7L_SEGD7L_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD7L */
/** @} End of group EFM32GG_LCD */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_lesense.h
* @brief EFM32GG_LESENSE register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_LESENSE
* @{
@@ -1922,5 +1926,5 @@ typedef struct
#define LESENSE_CH_EVAL_SCANRESINV_DEFAULT (_LESENSE_CH_EVAL_SCANRESINV_DEFAULT << 19) /**< Shifted mode DEFAULT for LESENSE_CH_EVAL */
/** @} End of group EFM32GG_LESENSE */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_lesense_buf.h
* @brief EFM32GG_LESENSE_BUF register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief LESENSE_BUF EFM32GG LESENSE BUF
*****************************************************************************/
@@ -37,3 +41,6 @@ typedef struct
__IO uint32_t DATA; /**< Scan results */
} LESENSE_BUF_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_lesense_ch.h
* @brief EFM32GG_LESENSE_CH register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief LESENSE_CH EFM32GG LESENSE CH
*****************************************************************************/
@@ -40,3 +44,6 @@ typedef struct
uint32_t RESERVED0[1]; /**< Reserved future */
} LESENSE_CH_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_lesense_st.h
* @brief EFM32GG_LESENSE_ST register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief LESENSE_ST EFM32GG LESENSE ST
*****************************************************************************/
@@ -38,3 +42,6 @@ typedef struct
__IO uint32_t TCONFB; /**< State transition configuration B */
} LESENSE_ST_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_letimer.h
* @brief EFM32GG_LETIMER register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_LETIMER
* @{
@@ -404,5 +408,5 @@ typedef struct
#define LETIMER_ROUTE_LOCATION_LOC3 (_LETIMER_ROUTE_LOCATION_LOC3 << 8) /**< Shifted mode LOC3 for LETIMER_ROUTE */
/** @} End of group EFM32GG_LETIMER */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_leuart.h
* @brief EFM32GG_LEUART register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_LEUART
* @{
@@ -695,5 +699,5 @@ typedef struct
#define LEUART_INPUT_RXPRS_DEFAULT (_LEUART_INPUT_RXPRS_DEFAULT << 4) /**< Shifted mode DEFAULT for LEUART_INPUT */
/** @} End of group EFM32GG_LEUART */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_msc.h
* @brief EFM32GG_MSC register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_MSC
* @{
@@ -459,5 +463,5 @@ typedef struct
#define MSC_MASSLOCK_LOCKKEY_UNLOCK (_MSC_MASSLOCK_LOCKKEY_UNLOCK << 0) /**< Shifted mode UNLOCK for MSC_MASSLOCK */
/** @} End of group EFM32GG_MSC */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_pcnt.h
* @brief EFM32GG_PCNT register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_PCNT
* @{
@@ -413,5 +417,5 @@ typedef struct
#define PCNT_INPUT_S1PRSEN_DEFAULT (_PCNT_INPUT_S1PRSEN_DEFAULT << 10) /**< Shifted mode DEFAULT for PCNT_INPUT */
/** @} End of group EFM32GG_PCNT */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_prs.h
* @brief EFM32GG_PRS register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_PRS
* @{
@@ -447,5 +451,5 @@ typedef struct
#define PRS_CH_CTRL_ASYNC_DEFAULT (_PRS_CH_CTRL_ASYNC_DEFAULT << 28) /**< Shifted mode DEFAULT for PRS_CH_CTRL */
/** @} End of group EFM32GG_PRS */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_prs_ch.h
* @brief EFM32GG_PRS_CH register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief PRS_CH EFM32GG PRS CH
*****************************************************************************/
@@ -37,3 +41,6 @@ typedef struct
__IO uint32_t CTRL; /**< Channel Control Register */
} PRS_CH_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_prs_signals.h
* @brief EFM32GG_PRS_SIGNALS register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @addtogroup EFM32GG_PRS_Signals
* @{
@@ -118,5 +122,5 @@
#define PRS_LESENSE_DEC2 ((59 << 16) + 2) /**< PRS LESENSE Decoder PRS out 2 */
/** @} End of group EFM32GG_PRS */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_rmu.h
* @brief EFM32GG_RMU register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_RMU
* @{
@@ -154,5 +158,5 @@ typedef struct
#define RMU_CMD_RCCLR_DEFAULT (_RMU_CMD_RCCLR_DEFAULT << 0) /**< Shifted mode DEFAULT for RMU_CMD */
/** @} End of group EFM32GG_RMU */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_romtable.h
* @brief EFM32GG_ROMTABLE register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_ROMTABLE
* @{
@@ -64,5 +68,5 @@ typedef struct
#define _ROMTABLE_PID3_REVMINORLSB_SHIFT 4 /**< Least Significant Bits [3:0] of CHIP MINOR revision, shift */
/** @} End of group EFM32GG_ROMTABLE */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_rtc.h
* @brief EFM32GG_RTC register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_RTC
* @{
@@ -210,5 +214,5 @@ typedef struct
#define RTC_SYNCBUSY_COMP1_DEFAULT (_RTC_SYNCBUSY_COMP1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTC_SYNCBUSY */
/** @} End of group EFM32GG_RTC */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_timer.h
* @brief EFM32GG_TIMER register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_TIMER
* @{
@@ -960,5 +964,5 @@ typedef struct
#define TIMER_DTLOCK_LOCKKEY_UNLOCK (_TIMER_DTLOCK_LOCKKEY_UNLOCK << 0) /**< Shifted mode UNLOCK for TIMER_DTLOCK */
/** @} End of group EFM32GG_TIMER */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_timer_cc.h
* @brief EFM32GG_TIMER_CC register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief TIMER_CC EFM32GG TIMER CC
*****************************************************************************/
@@ -40,3 +44,6 @@ typedef struct
__IO uint32_t CCVB; /**< CC Channel Buffer Register */
} TIMER_CC_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_uart.h
* @brief EFM32GG_UART register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_UART_BitFields
@@ -1113,5 +1117,5 @@
#define UART_I2SCTRL_FORMAT_W8D8 (_UART_I2SCTRL_FORMAT_W8D8 << 8) /**< Shifted mode W8D8 for UART_I2SCTRL */
/** @} End of group EFM32GG_UART */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_usart.h
* @brief EFM32GG_USART register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_USART
* @{
@@ -1145,5 +1149,5 @@ typedef struct
#define USART_I2SCTRL_FORMAT_W8D8 (_USART_I2SCTRL_FORMAT_W8D8 << 8) /**< Shifted mode W8D8 for USART_I2SCTRL */
/** @} End of group EFM32GG_USART */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_usb.h
* @brief EFM32GG_USB register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @defgroup EFM32GG_USB
* @{
@@ -2649,5 +2653,5 @@ typedef struct
#define USB_FIFORAM_FIFORAM_DEFAULT (_USB_FIFORAM_FIFORAM_DEFAULT << 0) /**< Shifted mode DEFAULT for USB_FIFORAM */
/** @} End of group EFM32GG_USB */
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_usb_diep.h
* @brief EFM32GG_USB_DIEP register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief USB_DIEP EFM32GG USB DIEP
*****************************************************************************/
@@ -44,3 +48,6 @@ typedef struct
uint32_t RESERVED2[1]; /**< Reserved future */
} USB_DIEP_TypeDef;
/** @} End of group Parts */

View File

@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32gg_usb_doep.h
* @brief EFM32GG_USB_DOEP register and bit field definitions
* @version 4.0.0
* @version 4.2.1
******************************************************************************
* @section License
* <b>(C) Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
* <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -29,6 +29,10 @@
* any third party, arising from your use of this Software.
*
*****************************************************************************/
/**************************************************************************//**
* @addtogroup Parts
* @{
******************************************************************************/
/**************************************************************************//**
* @brief USB_DOEP EFM32GG USB DOEP
*****************************************************************************/
@@ -43,3 +47,6 @@ typedef struct
uint32_t RESERVED2[2]; /**< Reserved future */
} USB_DOEP_TypeDef;
/** @} End of group Parts */

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