mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2025-12-13 03:22:31 +08:00
b5d863152a
Add "(void) param;" annotation to address unused parameter warnings. Found with GCC's warning -Wunused-parameter.
112 lines
2.9 KiB
C
112 lines
2.9 KiB
C
/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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*/
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/*
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* COPYRIGHT (c) 1989-2012.
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* On-Line Applications Research Corporation (OAR).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <rtems.h>
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#include <stdlib.h>
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#include <bsp/irq-generic.h>
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#include <bsp/pci.h>
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#include <bsp/i8259.h>
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#include <bsp.h>
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#include <libcpu/isr_entries.h>
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void mips_default_isr( int vector );
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#include <rtems/bspIo.h> /* for printk */
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void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )
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{
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(void) frame;
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unsigned int sr;
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unsigned int cause;
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unsigned int pending;
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mips_get_sr( sr );
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mips_get_cause( cause );
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pending = (cause & sr & 0xff00) >> CAUSE_IPSHIFT;
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/* SW Bits */
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if ( pending & 0x01) {
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printk("Pending IRQ Q 0x%x\n", pending );
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}
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if ( pending & 0x02) {
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printk("Pending IRQ Q 0x%x\n", pending );
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}
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/* South Bridge Interrupt */
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if ( pending & 0x04) {
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BSP_i8259s_int_process();
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}
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/* South Bridge SMI */
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if (pending & 0x08){
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printk( "Pending IRQ 0x%x\n", pending );
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}
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/* TTY 2 */
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if (pending & 0x10) {
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printk( "Pending IRQ 0x%x\n", pending );
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}
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/* Core HI */
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if (pending & 0x20) {
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printk( "Pending IRQ 0x%x\n", pending );
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}
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/* Core LO */
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if (pending & 0x40) {
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printk( "Pending IRQ 0x%x\n", pending );
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}
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if ( pending & 0x80 ) {
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bsp_interrupt_handler_dispatch( MALTA_INT_TICKER );
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}
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}
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void mips_default_isr( int vector )
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{
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unsigned int sr;
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unsigned int cause;
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mips_get_sr( sr );
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mips_get_cause( cause );
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printk( "Unhandled isr exception: vector 0x%02x, cause 0x%08X, sr 0x%08X\n",
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vector, cause, sr );
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while(1); /* Lock it up */
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rtems_fatal_error_occurred(1);
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}
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