arch/arm64/src/imx9/imx9_flexspi_nor.c: Implement MTDIOC_RESET command

MTDIOC_RESET ioctl command executes "Reset Enable" and "Reset Memory"
commands to enter a power-on reset condition.

Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
This commit is contained in:
Jani Paalijarvi
2025-11-10 10:47:04 +02:00
committed by Xiang Xiao
parent c793572c1c
commit 97c228c517

View File

@@ -252,6 +252,8 @@
#define M25P_WECR 0x61 /* 1 Write Enhanched config 0 0 1 */
#define M25P_RFSR 0x70 /* 1 Read Flag Status Register 0 0 1 */
#define M25P_4B_ENTER 0xB7 /* 1 Enter 4byte addressing 0 0 0 */
#define M25P_RSTEN 0x66 /* 1 Reset Enable 0 0 0 */
#define M25P_RSTMEM 0x99 /* 1 Reset Memory 0 0 0 */
/* Quad commands */
#define M25P_Q_FAST_RD 0x6c /* 1 Quad output fast read 4 0 1-256 */
@@ -281,6 +283,8 @@ enum
ENTER_DDR,
READ_FAST,
ENTER_4BYTE,
RESET_ENABLE,
RESET_MEMORY,
/* Quad SPI instructions */
@@ -376,6 +380,18 @@ static const uint32_t g_flexspi_nor_lut[][4] =
FLEXSPI_LUT_SEQ(FLEXSPI_COMMAND_DUMMY_SDR, FLEXSPI_1PAD, 0x08,
FLEXSPI_COMMAND_READ_SDR, FLEXSPI_1PAD, 0x04)
},
[RESET_ENABLE] =
{
FLEXSPI_LUT_SEQ(FLEXSPI_COMMAND_SDR, FLEXSPI_1PAD, M25P_RSTEN,
FLEXSPI_COMMAND_STOP, FLEXSPI_1PAD, 0x00),
},
[RESET_MEMORY] =
{
FLEXSPI_LUT_SEQ(FLEXSPI_COMMAND_SDR, FLEXSPI_1PAD, M25P_RSTMEM,
FLEXSPI_COMMAND_STOP, FLEXSPI_1PAD, 0x00),
},
};
/****************************************************************************
@@ -974,6 +990,23 @@ static int imx9_flexspi_nor_ioctl(struct mtd_dev_s *dev,
break;
case MTDIOC_RESET:
{
/* Reset the memory */
imx9_flexspi_nor_write_cmd(priv, RESET_ENABLE);
up_udelay(1);
ret = imx9_flexspi_nor_write_cmd(priv, RESET_MEMORY);
if (ret)
{
ferr("reset memory failed\n");
}
imx9_flexspi_nor_wait_bus_busy(priv);
FLEXSPI_SOFTWARE_RESET(priv->flexspi);
}
break;
default:
ret = -ENOTTY; /* Bad/unsupported command */
break;